Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI

Kato, S., & Watanabe, M. (2009). Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI. Lecture notes in computer science, 139–148. https://doi.org/10.1007/978-3-642-03138-0_15

Kato, Shinichi, and Minoru Watanabe. “Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI.” Lecture notes in computer science, 2009, pp. 139–48, https://doi.org/10.1007/978-3-642-03138-0_15.

Kato, Shinichi, and Minoru Watanabe. 2009. “Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI.” Lecture notes in computer science: 139–48. https://doi.org/10.1007/978-3-642-03138-0_15.

Kato, S. and Watanabe, M. (2009) ‘Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI’, Lecture notes in computer science, pp. 139–148. Available at: https://doi.org/10.1007/978-3-642-03138-0_15.

@incollection{kato2009inversion,
  title = {{Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI}},
  author = {Kato, Shinichi and Watanabe, Minoru},
  booktitle = {Lecture notes in computer science},
  pages = {139--148},
  year = {2009},
  doi = {10.1007/978-3-642-03138-0_15}
}