conference paper · Springer eBooks · 2007
An Efficient Code Generation Algorithm for Code Size Reduction Using 1-Offset P-Code Queue Computation Model
Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa
Cited by 5Abstract and details only
Abstract
The index has no abstract for this paper. The publisher’s page may have one.
Cite this paper
Canedo, A., Abdallah, A. B., & Sowa, M. (2007). An Efficient Code Generation Algorithm for Code Size Reduction Using 1-Offset P-Code Queue Computation Model. Springer eBooks, 196–208. https://doi.org/10.1007/978-3-540-77092-3_18
Canedo, Arquimedes, et al. “An Efficient Code Generation Algorithm for Code Size Reduction Using 1-Offset P-Code Queue Computation Model.” Springer eBooks, 2007, pp. 196–208, https://doi.org/10.1007/978-3-540-77092-3_18.
Canedo, Arquimedes, Abderazek Ben Abdallah, and Masahiro Sowa. 2007. “An Efficient Code Generation Algorithm for Code Size Reduction Using 1-Offset P-Code Queue Computation Model.” Springer eBooks: 196–208. https://doi.org/10.1007/978-3-540-77092-3_18.
Canedo, A., Abdallah, A.B. and Sowa, M. (2007) ‘An Efficient Code Generation Algorithm for Code Size Reduction Using 1-Offset P-Code Queue Computation Model’, Springer eBooks, pp. 196–208. Available at: https://doi.org/10.1007/978-3-540-77092-3_18.
@article{canedo2007efficient,
title = {{An Efficient Code Generation Algorithm for Code Size Reduction Using 1-Offset P-Code Queue Computation Model}},
author = {Canedo, Arquimedes and Abdallah, Abderazek Ben and Sowa, Masahiro},
journal = {Springer eBooks},
pages = {196--208},
year = {2007},
doi = {10.1007/978-3-540-77092-3_18}
}Made from the index record. Check names, capitalisation and page numbers against the paper. Need another style? AI for Research has over 10,000.
Related papers
Compiling for Reduced Bit-Width Queue Processors
Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa · Journal of Signal Processing Systems · 2008
Cited by 8
Compiler Support for Code Size Reduction Using a Queue-Based Processor
Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa · Lecture notes in computer science · 2009
Cited by 7
Efficient code size reduction without performance loss
Liu Xianhua, Zhang Jiyu, Cheng Xu · ACM Symposium on Applied Computing · 2007
Cited by 4
An efficient compiler technique for code size reduction using reduced bit-width ISAs
Ashok Halambi, Aviral Shrivastava, Partha Pratim Biswas et al. · Design, Automation, and Test in Europe · 2003
Cited by 25
An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs
Ashok Halambi, Aviral Shrivastava, Partha Pratim Biswas et al. · 2002
Cited by 44
Compilation framework for code size reduction using reduced bit-width ISAs (rISAs)
Aviral Shrivastava, Partha Pratim Biswas, Ashok Halambi et al. · ACM Transactions on Design Automation of Electronic Systems · 2006
Cited by 17
PARE: instruction set architecture for efficientcode size reduction
Young-Jun Kwon, Xiarong Ma, Hyuk-Jae Lee · Electronics Letters · 1999
Cited by 21
Instruction Set Encoding Optimization for Code Size Reduction
Michael Med, Andreas Krall · International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation · 2007
Cited by 3