article · 1999

A fully asynchronous superscalar architecture

Cited by 5Abstract and details only

Abstract

An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwarding of data based on local information, while maintaining the advantages of asynchrony in terms of exploiting actual delays. Results are presented in which statically and dynamically compounded architectures are compared against an equivalent synchronous superscalar architecture. 1.

Cite this paper

APA 7

Arvind, D. K., & Mullins, R. (1999). A fully asynchronous superscalar architecture. https://doi.org/10.5555/520793.825747

MLA 9

Arvind, D. K., and Robert Mullins. “A fully asynchronous superscalar architecture.” 1999, pp. 17–22, https://doi.org/10.5555/520793.825747.

Chicago

Arvind, D. K., and Robert Mullins. 1999. “A fully asynchronous superscalar architecture.” https://doi.org/10.5555/520793.825747.

Harvard

Arvind, D.K. and Mullins, R. (1999) ‘A fully asynchronous superscalar architecture’. Available at: https://doi.org/10.5555/520793.825747.

BibTeX

@article{arvind1999fully,
  title = {{A fully asynchronous superscalar architecture}},
  author = {Arvind, D. K. and Mullins, Robert},
  pages = {17--22},
  year = {1999},
  doi = {10.5555/520793.825747}
}

Made from the index record. Check names, capitalisation and page numbers against the paper. Need another style? AI for Research has over 10,000.