article · 1989

Massively parallel switch-level simulation: a feasibility study

Saul Kravitz, Randal E. Bryant, Rob A. Rutenbar

Cited by 17Open access

Abstract

This work addresses the feasibility of mapping the COSMOS switch-level simulator onto a computer with thousands of simple processors. COSMOS preprocesses transistor networks into Boolean behavioral models, capturing the switch-level behavior of a circuit in a set of Boolean formulas. We describe a class of massively parallel computers and a mapping of COSMOS onto these computers. We discuss the factors affecting the performance of such a massively parallel simulator including: the amount of parallelism in the simulation model, performance measures for massively parallel machines, and the impact of event scheduling on simulator performance. We have developed compilation tools which automatically map a MOS circuit onto a massively parallel computer. Massively parallel switch-level simulation is illustrated by describing our pilot implementation on a 32k processor Thinking Machines Connection Machine System.

Cite this paper

APA 7

Kravitz, S., Bryant, R. E., & Rutenbar, R. A. (1989). Massively parallel switch-level simulation: a feasibility study. https://doi.org/10.1145/74382.74399

MLA 9

Kravitz, Saul, et al. “Massively parallel switch-level simulation: a feasibility study.” 1989, pp. 91–97, https://doi.org/10.1145/74382.74399.

Chicago

Kravitz, Saul, Randal E. Bryant, and Rob A. Rutenbar. 1989. “Massively parallel switch-level simulation: a feasibility study.” https://doi.org/10.1145/74382.74399.

Harvard

Kravitz, S., Bryant, R.E. and Rutenbar, R.A. (1989) ‘Massively parallel switch-level simulation: a feasibility study’. Available at: https://doi.org/10.1145/74382.74399.

BibTeX

@article{kravitz1989massively,
  title = {{Massively parallel switch-level simulation: a feasibility study}},
  author = {Kravitz, Saul and Bryant, Randal E. and Rutenbar, Rob A.},
  pages = {91--97},
  year = {1989},
  doi = {10.1145/74382.74399}
}

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