article · 2002
Incremental test pattern generation
Cited by 2Abstract and details only
Abstract
Discusses a test pattern generation (TPG) algorithm for single stuck-at faults in combinational logic circuits. Current TPG systems generate a test vector for fault F/sub i+1/ independently of the computation previously done for faults F/sub 1/, F/sub 2/, . . ., F/sub i/. The algorithm ITPG, generates a test vector for fault F/sub i+1/ by starting with (inheriting) the test vector for fault F/sub i/. A new test vector is generated from inherited values by gradually changing the inherited values. The inherited values may partially activate a fault and propagate the fault signal. Normally, this reduces the number of decision steps and backtracks in the second search. Experimental results for well-known benchmark circuits show that ITPG is very efficient with a small backtrack limit; in combination with other algorithms, it is very efficient for arbitrary backtrack limits.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
Cite this paper
Song, S., & Kinney, L. (2002). Incremental test pattern generation. https://doi.org/10.1109/vtest.1993.313353
Song, Sang‐Hoon, and L.L. Kinney. “Incremental test pattern generation.” 2002, pp. 244–50, https://doi.org/10.1109/vtest.1993.313353.
Song, Sang‐Hoon, and L.L. Kinney. 2002. “Incremental test pattern generation.” https://doi.org/10.1109/vtest.1993.313353.
Song, S. and Kinney, L. (2002) ‘Incremental test pattern generation’. Available at: https://doi.org/10.1109/vtest.1993.313353.
@article{song2002incremental,
title = {{Incremental test pattern generation}},
author = {Song, Sang‐Hoon and Kinney, L.L.},
pages = {244--250},
year = {2002},
doi = {10.1109/vtest.1993.313353}
}Made from the index record. Check names, capitalisation and page numbers against the paper. Need another style? AI for Research has over 10,000.