article · 2002

VLSI implementation of a vector quantization processor

Cited by 4Abstract and details only

Abstract

Summary form only given. This presentation contains a discussion of the needs for a hardware Vector Quantization processor and the trade-offs involved in its design and implementation. The Codebook Processor Chip (CPC16) is a VQ processor capable of finding a full-search best match on sixteen codevectors in parallel. Maximum vector size is 625 samples. Full search of larger codebooks is possible by cascading several chips in parallel. Tree search and multi-stage searches are possible by cascading multiple chips in series in a pipeline structure.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>

Cite this paper

APA 7

Israelsen, P. (2002). VLSI implementation of a vector quantization processor. https://doi.org/10.1109/dcc.1991.213298

MLA 9

Israelsen, Paul. “VLSI implementation of a vector quantization processor.” 2002, p. 463, https://doi.org/10.1109/dcc.1991.213298.

Chicago

Israelsen, Paul. 2002. “VLSI implementation of a vector quantization processor.” https://doi.org/10.1109/dcc.1991.213298.

Harvard

Israelsen, P. (2002) ‘VLSI implementation of a vector quantization processor’. Available at: https://doi.org/10.1109/dcc.1991.213298.

BibTeX

@article{israelsen2002vlsi,
  title = {{VLSI implementation of a vector quantization processor}},
  author = {Israelsen, Paul},
  pages = {463},
  year = {2002},
  doi = {10.1109/dcc.1991.213298}
}

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