book chapter · 2015

A 4-bit array multiplier design by reversible logic

J. Qian

Cited by 3Abstract and details only

Abstract

With the development of mobile computing, the low power design becomes increasingly important in integrated circuits. Thus, more and more concern falls on energy dissipation. However, energy dissipation in irreversible logic design is inevitable, which is explained by Landauer’s principle-kTln2 joules of heat energy will be generated once erasing each bit of information [1]. One of the solutions is designing the circuits by reversible logic.

Cite this paper

APA 7

Qian, J. (2015). A 4-bit array multiplier design by reversible logic. https://doi.org/10.1201/b18776-5

MLA 9

Qian, J. “A 4-bit array multiplier design by reversible logic.” 2015, pp. 21–24, https://doi.org/10.1201/b18776-5.

Chicago

Qian, J. 2015. “A 4-bit array multiplier design by reversible logic.” https://doi.org/10.1201/b18776-5.

Harvard

Qian, J. (2015) ‘A 4-bit array multiplier design by reversible logic’. Available at: https://doi.org/10.1201/b18776-5.

BibTeX

@incollection{qian2015array,
  title = {{A 4-bit array multiplier design by reversible logic}},
  author = {Qian, J.},
  pages = {21--24},
  year = {2015},
  doi = {10.1201/b18776-5}
}

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