article · 2001

Macrocell Architectures for Product Term Embedded Memory Arrays

Cited by 0Abstract and details only

Abstract

. We examine ways to increase product term usage e#ciency and propose several new sharing architectures that addresses this problem. We also present a technology mapping algorithm for product term based FPGA embedded memory arrays. Our algorithm, pMapster, is used to investigate the e#ects of macrocell granularity and macrocell sharing on the amount of logic that can be packed into a product term embedded memory array. 1

Cite this paper

APA 7

Lin, E. Y., & Wilton, S. J. E. (2001). Macrocell Architectures for Product Term Embedded Memory Arrays.

MLA 9

Lin, Erika Y., and Steven J. E. Wilton. “Macrocell Architectures for Product Term Embedded Memory Arrays.” 2001.

Chicago

Lin, Erika Y., and Steven J. E. Wilton. 2001. “Macrocell Architectures for Product Term Embedded Memory Arrays.”

Harvard

Lin, E.Y. and Wilton, S.J.E. (2001) ‘Macrocell Architectures for Product Term Embedded Memory Arrays’.

BibTeX

@article{lin2001macrocell,
  title = {{Macrocell Architectures for Product Term Embedded Memory Arrays}},
  author = {Lin, Erika Y. and Wilton, Steven J. E.},
  year = {2001}
}

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