dissertation · 2010

Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora

Cited by 0Abstract and details only

Abstract

In this thesis, a proposal was given to improve the existing architecture of a dynamic variable processor optimized for fast execution of various algorithms over large data sets. Analyzed behavior of the initial architecture has resulted with appropriate changes. Thesis gives description of the capabilities of individual components and their behavior during program execution. Suggested modeling and simulation techniques ensure various reconfigurable processor architectures. The proposed procedure allows changes to the architecture and extension of the simulator with other tools such as support for debugging. Development environment combines a text editor, assembler compiler and support for debugging.

Cite this paper

APA 7

Vujović, B. (2010). Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora.

MLA 9

Vujović, Branislav. “Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora.” 2010.

Chicago

Vujović, Branislav. 2010. “Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora.”

Harvard

Vujović, B. (2010) ‘Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora’.

BibTeX

@phdthesis{vujovic2010modeliranje,
  title = {{Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora}},
  author = {Vujović, Branislav},
  year = {2010}
}

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