article · 1999

1 Problem Statement Phase Synchronization

Jayadev Misra

Cited by 0Abstract and details only

Abstract

Consider a set of asynchronous processes where each process executes a sequence of phases; a process begins its next phase only upon completion of its previous phase. What constitutes a phase is irrelevant for our purposes. It is required to design a synchronization mechanism that guarantees that: • No process begins phase (k + 1) until all processes have completed phase k, k ≥ 0. (Initially, all processes have completed their phase 0.) • No process will be permanently blocked from executing its phase (k + 1) if all processes have completed their phase k, k ≥ 0. Assume that the processes communicate through shared variables; contentions for access (read or write) to a shared variable by different processes are resolved arbitrarily but fairly (i.e., any process attempting to read/write a shared variable will do so eventually). Nothing may be assumed about the initial values of the shared variables. In the absence of this requirement, the following simple algorithm suffices: A counter variable c is initially 0; c is incremented by 1 whenever a process completes a phase; a process begins its phase (k + 1) only if c ≥ k × N, where N is the number of processes. One of the applications of phase synchronization is to initialize the variables

Cite this paper

APA 7

Misra, J. (1999). 1 Problem Statement Phase Synchronization.

MLA 9

Misra, Jayadev. “1 Problem Statement Phase Synchronization.” 1999.

Chicago

Misra, Jayadev. 1999. “1 Problem Statement Phase Synchronization.”

Harvard

Misra, J. (1999) ‘1 Problem Statement Phase Synchronization’.

BibTeX

@article{misra1999problem,
  title = {{1 Problem Statement Phase Synchronization}},
  author = {Misra, Jayadev},
  year = {1999}
}

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