article · 2001

Buffered Tiling for Sequences of Loop Nests

Youcef Bouchebaba, Fabien Coelho

Cited by 0Abstract and details only

Abstract

Usually tiling is applied to one loop nest at a time. In this paper we apply tiling and fusion simultaneously to a sequence of parallel nested loops in order to minimize data movements and energy consumption and/or to maximize the speed of execution. Each of these nests uses as input a stencil of data computed in a previous nest. After fusion and tiling, we guarantee that data necessary to the execution of an iteration has been already computed by the previous iterations by delaying the computation of consumer nest. We take into account the relation among the various stencils, the added delays and the tiling parameters and we give a solution for a class of tiling. To store only the live data elements, we compute the surface of these data for every array and during the code generation we replace this array by a buffer whose size is equal to the surface of live data. We measured cache misses for the transformed versions of the example program.

Cite this paper

APA 7

Bouchebaba, Y., & Coelho, F. (2001). Buffered Tiling for Sequences of Loop Nests.

MLA 9

Bouchebaba, Youcef, and Fabien Coelho. “Buffered Tiling for Sequences of Loop Nests.” 2001.

Chicago

Bouchebaba, Youcef, and Fabien Coelho. 2001. “Buffered Tiling for Sequences of Loop Nests.”

Harvard

Bouchebaba, Y. and Coelho, F. (2001) ‘Buffered Tiling for Sequences of Loop Nests’.

BibTeX

@article{bouchebaba2001buffered,
  title = {{Buffered Tiling for Sequences of Loop Nests}},
  author = {Bouchebaba, Youcef and Coelho, Fabien},
  year = {2001}
}

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