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book chapter · Vieweg+Teubner eBooks · 2011

Standard Multi-Core Processors

Holger Scherl

Cited by 0Abstract and details only

Abstract

AbstractFor a long time, the performance of general-purpose processors could be improved by increasing clock frequency and instruction level parallelism (ILP). Nowadays, only diminished gains in performance can be reached by higher processor clock rates. This results from the difficulty to find enough parallelism in the instruction stream of a single process to keep higher performance processor cores busy. Another cause is the increasing gap between processor and main memory speed because the latency and the bandwidth of dynamic random access memory (DRAM) does not improve accordingly to processor operating frequencies. Finally, higher clock rates of generalpurpose processors lead to dramatically increased problems in manufacturing, system design, and deployment. These three arguments, commonly referred to as the ILP wall, the memory wall and the power wall, respectively, have constituted much of the motivation for the advent of multi-core processors during the last few years.KeywordsProjection ImageDynamic Random Access MemoryWork ThreadInstruction Level ParallelismStream SIMD ExtensionThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Cite this paper

APA 7

Scherl, H. (2011). Standard Multi-Core Processors. Vieweg+Teubner eBooks, 71–75. https://doi.org/10.1007/978-3-8348-8259-2_5

MLA 9

Scherl, Holger. “Standard Multi-Core Processors.” Vieweg+Teubner eBooks, 2011, pp. 71–75, https://doi.org/10.1007/978-3-8348-8259-2_5.

Chicago

Scherl, Holger. 2011. “Standard Multi-Core Processors.” Vieweg+Teubner eBooks: 71–75. https://doi.org/10.1007/978-3-8348-8259-2_5.

Harvard

Scherl, H. (2011) ‘Standard Multi-Core Processors’, Vieweg+Teubner eBooks, pp. 71–75. Available at: https://doi.org/10.1007/978-3-8348-8259-2_5.

BibTeX
@incollection{scherl2011standard,
  title = {{Standard Multi-Core Processors}},
  author = {Scherl, Holger},
  booktitle = {Vieweg+Teubner eBooks},
  pages = {71--75},
  year = {2011},
  doi = {10.1007/978-3-8348-8259-2_5}
}

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