Ms A, Hui Li, Hui Li et al. · 1994
A new approach to parallel sorting called Parallel Sorting by OverPartitioning (PSOP) is presented. The approach limits the communication cost by moving each element between processors at most once, and leads to good load balancing with high probability. The PSOP framework can be applied to both comparison and non-comparison sorts. Implementations on the KSR1 and Hector shared memory multiprocessors show that PSOP achieves nearly linear speedup and outperforms alternative approaches. An analytical model for PSOP has been developed that predicts the performance within 10% accuracy. Key Words: Parallel Sorting, Load Balance, Overpartitioning, Oversampling, COMA and NUMA Multiprocessors. 1 Introduction Sorting is an important symbolic application [4], and parallel algorithms for sorting have been studied intensively ever since Batcher [5] proposed the bitonic-sorting network. Although the theoretical community has devoted considerable effort to the design of parallel sorting algorithms ...
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Arash Khalilnejad (9713164), Ahmad M. Karimi (9713167), Shreyas Kamath (9713170) et al. · Figshare · 2020
<p>Processing time comparison of jobs with number of cores, (a) single-core and multi-core parallel jobs processing times, (b) performance of individual jobs with allocation of cores within each job.</p>
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Andrew Grimshaw, Emily A. West, William R. Pearson · Concurrency Practice and Experience · 1993
Abstract Throughout much of the parallel processing community there is the sense that writing software for distributed‐memory parallel processors Is subject to a ‘no pain—no gain’ rule: that In order to reap the benefits of parallel computation one must first suffer the pain of converting the application to run on a parallel machine. We believe this Is the result of Inadequate programming tools and not a problem Inherent to parallel processing. We will show that one can parallelize real scientific applications and obtain good performance with little effort If the right tools are used. Our vehicle for this demonstration is a 6000‐line DNA and protein sequence comparison application that we have implemented in Mental, an object‐oriented parallel processing system for both parallel and distributed architectures. We briefly describe the application and present performance information for both the Mentat version and a hand‐coded parallel version of the application.
Cited by 29
Simi Zerine Sleeba, Karthika B.R., K. Sakthi Sudhan et al. · Indonesian Journal of Electrical Engineering and Informatics (IJEEI) · 2024
The Fast Fourier Transform (FFT) is widely used in digital signal processing ap-plications and particularly for implementing convolution operation for real-time object detection using CNN. This paper proposes an efficient hardware architecture for Radix-2 FFT computation, implemented on an FPGA, employing multiple parallel and pipelined stages of butterfly units. The proposed architecture utilises Block RAM to store inputs and twiddle factor values to compute the transform. The hardware for the proposed architecture is synthesised on a Zync Ultrascale FPGA and its performance is evaluated using parameters such as critical path delay, throughput, device utilisation and power consumption.The performance of the proposed parallel pipelined architecture for 8 point FFT, measured in FFTOPS, is found to be 67% higher than the non-pipelined architecture. Performance comparison with the state-of-the-art parallel pipelined methods confirm the acceleration achieved by the proposed FFT architecture. A comprehensive comparison of the proposed hardware with the synthesised version of the FFT IP core bundled with the Vivado Design suite is also presented in the paper.
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Sh. Darvishzadeh, A. Rahmati, Adib Abrishamifar · 2012
In this paper a novel control method for parallel UPS inverters has been proposed. UPS units paralleling reduces cost of installation and increases reliability of system. This new method is based on sliding mode control and has the benefits of sliding mode control such as robustness against disturbances and fast response. We use hierarchical model of sliding mode control for parallel inverters control. The performance of this method has been investigated through simulation and comparison with common methods of parallel inverters control. Simulation was done for two parallel inverters. Simulation results certified the sliding mode control possibility for parallel inverters control.
Cited by 7
Ranjita Asati, M. M. Raghuwanshi, Kavita Singh · International journal of electrical and computer engineering systems · 2024
In numerous clinical applications that support the diagnosis and treatment planning of a broad variety of disorders, medical image segmentation is essential. Medical picture segmentation using the Enhanced Extended Topological Active Net (EETAN) model has proven to be successful in correctly identifying structures. This study suggests a novel way to combine the best clustering techniques and parallel processing approaches to maximize the segmentation performance of the EETAN model. The Probabilistic Depth Search Optimization (PDSO) Algorithm, which makes the parallel searching technique to find the ideal contour set, is responsible for this. This work implements parallel processing and ideal clustering to improve the EETAN model's performance in medical image segmentation. Performance metrics like accuracy, precision, recall, dice similarity, and computational time are used for a comparison study. The results demonstrate the notable enhancements attained by employing parallel processing and effective clustering.
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Ramandeep Kaur Bal, Anil Kumar · International Journal of Image Graphics and Signal Processing · 2017
QRS detection is becoming more popular in detecting the heart beat rate. The improvement is done by using the new filter. The data and control parallelism is used in order to improve the execution time and speed of the parallel based hybrid MAMEMI filter technique This research work focus on providing better performance in heart beat detection algorithm by using parallel hybrid filter.An enhanced algorithm has been proposed to enhance the performance of QRS detection. Different parameters are used for the performance analysis. Accuracy,F_Measure, and Detection_Error_rate are the parameters which are used to evaluate the performance of heart beat algorithm. The results of proposed algorithm are compared with existing heart beat detection algorithm for performance comparison. On the other hand the performance of the proposed method is also improved using parallelism. Parallel proposed method shows better results than Sequential proposed method. The Mean improvement in execution time is 0.80.
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Kiran Haridas, K N Sreehari, Anu Chalil · 2021 Second International Conference on Electronics and Sustainable Communication Systems (ICESC) · 2021
With the evolving technology and effort to improve one's living through technology, innovation and improvisation are required. One of the most important concerns nowadays is the performance of gadgets in terms of speed, power, and area occupied. The majority of the time in wireless communication is focused on signal processing, where everyone is looking for innovative research to optimize the parameters for greater usability. The first major research breakthrough is the implementation of Fast Fourier Transform (FFT). This project involves the comparison of Parallel prefix adder and a modified multiplier in FFT radix 2 Butterfly unit with the conventional adder and multiplier. This multiplier also makes use of the parallel prefix algorithm, which reduces the delay. All the performance comparison is done on a single Butterfly unit. The parameters considered for comparison are area, power and delay. The conventional adder considered is CLA and Brent Kung as the PPA.
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Zainab M. Kubba · Journal of Al-Nahrain University-Science · 2013
Abstract The present work is a study of effects of partial shading on the performance of a PV module spatially on the maximum power point position. This paper clarifies the mechanism of partial PV shading on a number of PV module connected in series parallel and total cross tide. In series parallel connection the shading effects will be studied for deferent number of module. Also this search was mainly devoted to investigate the performance comparison between series parallel and total cross tide with bypass diode and without. A PSPICE simulation model that represents 36 cells PV module has been used to test this study and results are presented.
Cited by 1
María Guadalupe Sánchez, Vicente Vidal, Josep Arnal et al. · Procedia Computer Science · 2014
A parallel algorithm to remove impulsive noise in digital images using heterogeneous CPU/GPU computing is proposed. The parallel denoising algorithm is based on the peer group concept and uses an Euclidean metric. In order to identify the amount of pixels to be allocated in multi-core and GPUs, a performance analysis using large images is presented. A comparison of the parallel implementation in multi-core, GPUs and a combination of both is performed. Performance has been evaluated in terms of execution time and Megapixels/second. We present several optimization strategies especially effective for the multi-core environment, and demonstrate significant performance improvements. The main advantage of the proposed noise removal methodology is its computational speed, which enables efficient filtering of color images in real-time applications.
Cited by 6Open access
Hribar, Michelle, Frumkin, Michael, Waheed, Abdul et al. · NASA STI Repository (National Aeronautics and Space Administration)
Porting applications to new high performance parallel and distributed platforms is a challenging task. Writing parallel code by hand is time consuming and costly, but the task can be simplified by high level languages and would even better be automated by parallelizing tools and compilers. The definition of HPF (High Performance Fortran, based on data parallel model) and OpenMP (based on shared memory parallel model) standards has offered great opportunity in this respect. Both provide simple and clear interfaces to language like FORTRAN and simplify many tedious tasks encountered in writing message passing programs. In our study we implemented the parallel versions of the NAS Benchmarks with HPF and OpenMP directives. Comparison of their performance with the MPI implementation and pros and cons of different approaches will be discussed along with experience of using computer-aided tools to help parallelize these benchmarks. Based on the study,potentials of applying some of the techniques to realistic aerospace applications will be presented
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Boelter, L. M. K., Guibert, A. G., Romie, F. E. et al. · University of North Texas Digital Library (University of North Texas) · 1949
Report presenting a comparison of the thermal performance and pressure-drop characteristics of heat exchangers on a heat-exchanger test stand. The exchangers included parallel and cross-flow units as well as extended-surface and all-prime-surface units.
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L. M. K. Boelter, A G Guibert, F. E. Romie et al. · 1949
Report presenting a comparison of the thermal performance and pressure-drop characteristics of heat exchangers on a heat-exchanger test stand. The exchangers included parallel and cross-flow units as well as extended-surface and all-prime-surface units.
Cited by 2
Alrshah, Mohamed A., Othman, Mohamed · arXiv (Cornell University) · 2016
Parallel Transport Control Protocol (TCP) has been used to effectively utilize bandwidth for data intensive applications over high Bandwidth-Delay Product (BDP) networks. On the other hand, it has been argued that, a single-based TCP connection with proper modification such as HSTCP can emulate and capture the robustness of parallel TCP and can well replace it. In this work a Comparison between Single-Based and the proposed parallel TCP has been conducted to show the differences in their performance measurements such as throughput performance and throughput ratio, as well as the link sharing Fairness also has been observed to show the impact of using the proposed Parallel TCP on the existing Single-Based TCP connections. The experiment results show that, single-based TCP cannot overcome Parallel TCP especially in heterogeneous networks where the packet losses are common. Furthermore, the proposed parallel TCP does not affect TCP fairness which makes parallel TCP highly recommended to effectively utilize bandwidth for data intensive applications.
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Nguyen Dinh Lau · Zenodo (CERN European Organization for Nuclear Research) · 2018
This study builds up two parallel algorithms to improve computing performance for two listing binary and listing permutation algorithms. The problems are extremely interesting and practically applicable in many fields in our daily life. To parallel execution, we divide the data set input and allocate them to the processors. The article focuses on (i) the analysis of the research situation of the related works to compare and evaluate the existing problems of previous works, (ii) the analysis of the input data structure to divide data for the sub processors, (iii) the construction of parallel algorithms - proof of correctness and analysis of computing complexity, and (iv) experiments in multi-processing MPI and Thread library. Then the comparison of the results of the parallel algorithm with the sequential algorithm and the comparison of the execution time on different sub processors is discussed.
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M. Ashworth · 1998
Single node performance is a key issue in the optimisation of codes for massively parallel processors, especially for applications like ocean and atmospheric modelling where high parallel efficiency is easily obtained from the natural data locality. In this paper we demonstrate how specific optimisations to suit a particular target processor architecture can give significant performance benefits for a shallow sea model running on a range of high performance systems. A benchmark performance comparison between code optimised for vector processors and for scalar, cache-based processors shows a performance gain of up to a factor of 8.3 between the better and worse performing code. We also highlight the problems of maintaining a portable code that will perform well on both scalar and vector processors. 1. Introduction It is now possible for most scientific codes to achieve high parallel efficiency on today&apos;s high performance computer (HPC) systems, whether it is by using shared m...
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Ishfaq Ahmad, Min-You Wu, Jaehyung Yang et al. · 2007
This paper describes the performance evaluation of Express programming environment on the iPSC/2 and iPSC/860 hypercube computers. Express allows parallel programs to be developed in a completely portable fashion and is available on most commercially available parallel computers as well as networks of workstations. We have developed a set of benchmarks to make a comprehensive performance assessment of the frequently used communication primitives of Express on hypercube computers. A comparison with the equivalent iPSC/2 and iPSC/860 primitives is also carried out. In addition, we have developed and benchmarked a suite of real applications including three different versions of Gaussian elimination, fast Fourier transform, and the N-body problem. These results help us evaluate the performance of Express and judge its merits against the extra overhead incurred due to portability. The results also enable us to make a comparison of two generations of hypercube systems. Furthermore, algorithm...
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Ishfaq Ahmad · 1997
Due to the increasing popularity of networked clusters of workstations and the need for portability across various parallel and distributed platforms, a number of programming environments have been proposed to develop parallel programs. Express and PVM are two such commonly used environments that are available on most commercial parallel computers as well as a variety of clusters of workstations. Programs developed under Express are portable, that is, a program developed on one hardware platform can run on another platform without any significant modification (provided Express is available on both platforms). PVM provides a similar portability and is particularly suitable for heterogeneous systems. In this paper, we make an experimental performance comparison of Express and PVM. The comparison is done by evaluation of their performance through benchmarking on three platforms: an Intel iPSC/860 hypercube parallel computer, a cluster of SUN workstations connected by an Ethernet, and a cluster of HP workstations connected by an FDDI ring. The performance measures include the timings of various communication primitives coded with Express and PVM. The results of Express and PVM on the iPSC/860 are also compared with the equivalent implementations using the NX messagepassing library of the iPSC/860. To make a comparison from the applications point of view, we have also benchmarked a suite of various applications including three different versions of Gaussian elimination, and the N-body problem. The performance results also enable us to compare three different hardware platforms. While it is not the purpose of this study to make a qualitative judgement on Express and PVM, we highlight their usefulness and provide an overview of their programming styles and main features.
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Sayed Mohammad Badiezadegan · International Journal of Science and Research (IJSR) · 2024
Assuredly, the competency of MATLAB software in scientific and engineering research could not be ignored in this era. With its powerful modules, this software can perform a lot of modern industrial or even medical research efficiently. The biggest stunning point of this outstanding software is that it can process big data even without using supercomputers by taking advantage of multiple and successful parallel processing techniques. The following article will discuss the introduction of MATLAB parallel processing techniques. Afterward, some methods to achieve the best parallel processing performance using the graphics processing unit (GPU) are explained. Finally, the comparison between CPU parallel processing and GPU parallel processing will be discussed.
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Ruben Laso, Diego Krupitza, Sascha Hunold · arXiv (Cornell University) · 2024
Since the advent of parallel algorithms in the C++17 Standard Template Library (STL), the STL has become a viable framework for creating performance-portable applications. Given multiple existing implementations of the parallel algorithms, a systematic, quantitative performance comparison is essential for choosing the appropriate implementation for a particular hardware configuration. In this work, we introduce a specialized set of micro-benchmarks to assess the scalability of the parallel algorithms in the STL. By selecting different backends, our micro-benchmarks can be used on multi-core systems and GPUs. Using the suite, in a case study on AMD and Intel CPUs and NVIDIA GPUs, we were able to identify substantial performance disparities among different implementations, including GCC+TBB, GCC+HPX, Intel's compiler with TBB, or NVIDIA's compiler with OpenMP and CUDA.
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