Bruce Merry · Journal of Astronomical Telescopes Instruments and Systems · 2023
We present an implementation of a channelizer (F-engine) running on a graphics processing unit (GPU). While not the first GPU implementation of a channelizer, we have put significant effort into optimizing the implementation. We are able to process 4 antennas each with 2 Gsample / s, 10-bit dual-polarized input and 8-bit output, on a single commodity GPU. This fully utilizes the available peripheral component interconnect express (PCIe) bandwidth of the GPU. The system is not as optimized for a single high-bandwidth antenna but handles 6.2 Gsample / s, limited by single-core central processing unit (CPU) performance.
Cited by 0Open access
V. Kasik, A. Kurecka, P. Pospech · IFAC Proceedings Volumes · 2013
Cited by 2
Alpha Sarita Barik, Srinivas Mishra, Manoranjan Pradhan · 2015
Cited by 1
Ayman Khalafallah, Hosain Fath Elbabb, Omar Mahmoud et al. · 2010
Local Sequence alignment is an important task for bioinformatics. The most widely used algorithm is Smith-Waterman [1] has a quadratic time complexity which is time consuming especially in large biological database search. Many attempts were made to accelerate Smith-Waterman using parallel architecture. In this paper a parallel implementation of Smith Waterman algorithm will be presented. This implementation will run on Graphics Processing Unit using an open standard (OpenCL) by carefully exploiting features of the graphics processing unit, this implementation will be more than two times faster than the other parallel implementation on the Graphics Processing Unit.
Cited by 14
Adnan, M, Singleton, AD, Longley, PA · UCL Discovery (University College London)
Cited by 0
Masuda, Nobuyuki, Ito, Tomoyoshi, Tanaka, Takashi et al. · Figshare · 2006
We have applied the graphics processing unit (GPU) to computer generated holograms (CGH) to overcome the high computational cost of CGH and have compared the speed of a GPU implementation to a standard CPU implementation. The calculation speed of a GPU (GeForce 6600, nVIDIA) was found to be about 47 times faster than that of a personal computer with a Pentium 4 processor. Our system can realize real-time reconstruction of a 64-point 3-D object at video rate using a liquid-crystal display of resolution 800×600.
Cited by 0Open access
Edward S. Jimenez · OSTI OAI (U.S. Department of Energy Office of Scientific and Technical Information) · 2023
A method and apparatus for managing operation of graphics processing units in a computer system. A processing thread in the computer system controls processing of a set of sinogram data by a graphics processing unit to form a set of graphics data. An output thread in the computer system controls writing of the set of graphics data to a storage system. The graphics processing unit is available to perform processing of another set of sonogram data while the set of graphics data is written to the storage system such that the increased availability of a plurality of graphics processing units is present.
Cited by 0Open access
Nature Methods · 2018
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Denis Gladkov, José-Juan Tapia, Samuel Alberts et al. · SIMULATION · 2011
The direct simulation Monte Carlo (DSMC) is a computational method for fluid mechanics simulation in the regime of rarefied gas flow. It is a numerical solution of the Boltzmann equation based on an individual particle basis. Accurate simulations typically require particle numbers in the range of hundreds of thousands to millions. Such large simulations require an inordinate amount of time for processing using serial computing on central processing units (CPUs). In this paper we investigate data-parallel techniques on graphics processing units (GPUs) to execute very large scale DSMC simulations. We have designed and implemented Bird’s method on a three-dimensional simulation domain that includes complex geometry interactions. We also have tested and verified the statistical and theoretical accuracy of our implementation. Our results show substantial performance improvements (nearly two orders of magnitude) over Bird’s serial implementation without loss of accuracy.
Cited by 16
Guillaume Chapuis, Olivier Filangi, Jean-Michel Elsen et al. · Journal of Computational Biology · 2013
Mapping quantitative trait loci (QTL) using genetic marker information is a time-consuming analysis that has interested the mapping community in recent decades. The increasing amount of genetic marker data allows one to consider ever more precise QTL analyses while increasing the demand for computation. Part of the difficulty of detecting QTLs resides in finding appropriate critical values or threshold values, above which a QTL effect is considered significant. Different approaches exist to determine these thresholds, using either empirical methods or algebraic approximations. In this article, we present a new implementation of existing software, QTLMap, which takes advantage of the data parallel nature of the problem by offsetting heavy computations to a graphics processing unit (GPU). Developments on the GPU were implemented using Cuda technology. This new implementation performs up to 75 times faster than the previous multicore implementation, while maintaining the same results and level of precision (Double Precision) and computing both QTL values and thresholds. This speedup allows one to perform more complex analyses, such as linkage disequilibrium linkage analyses (LDLA) and multiQTL analyses, in a reasonable time frame.
Cited by 3
Masuda, Nobuyuki, Ito, Tomoyoshi, Tanaka, Takashi et al. · Figshare · 2006
We have applied the graphics processing unit (GPU) to computer generated holograms (CGH) to overcome the high computational cost of CGH and have compared the speed of a GPU implementation to a standard CPU implementation. The calculation speed of a GPU (GeForce 6600, nVIDIA) was found to be about 47 times faster than that of a personal computer with a Pentium 4 processor. Our system can realize real-time reconstruction of a 64-point 3-D object at video rate using a liquid-crystal display of resolution 800×600.
Cited by 0Open access
Krzysztof Pawłowski, Karol Kurach, Kim Svensson et al. · 2014
Coalition Structure Generation---the problem of finding the optimal division of agents into coalitions---has received considerable attention in recent AI literature. The fastest exact algorithm to solve this problem is IDP-IP$^*$, which is a hybrid of two previous algorithms, namely IDP and IP. Given this, it is desirable to speed up IDP as this will, in turn, improve upon the state-of-the-art. In this paper, we present IDP$^G$---the first coalition structure generation algorithm based on the \textit{Graphics Processing Unit (GPU)}. This follows a promising, new algorithm design paradigm that can provide significant speedups. We show that IDP$^G$ is faster than IDP by two orders of magnitude.
Cited by 0
Yunlong Huang, Keck Voon Ling, Simon See · ASEAN Engineering Journal · 2010
Quadratic Programming (QP) problems frequently appear as core component when solving constrained optimal control or estimation problems. The focus of this paper is on accelerating an existing Interior Point Method (IPM) for solving QP problems by exploiting the parallel computing characteristics of GPU. We compare the so-called data-parallel and the problem-parallel approaches to achieve speed up for solving QP problems. The data-parallel approach achieves speed up by parallelizing the vector and matrix computations such as the dot-product, while the problem-parallel approach solves multiple QP problems in parallel using one GPU. Our results show that solving several QP problems in parallel could lead to better utilization of the GPU resources. This problemparallel approach is well-suited for implementing a new type of Model Predictive Control algorithm characterized by solving multiple copies of MPC in parallel to improve closedloop performance.
Cited by 9Open access
Nicholas S. Kovach · 2012
Cited by 2
Tatyana A. Gultyaeva, Alexander Sautin, Vadim E. Uvarov · 2014 12th International Conference on Actual Problems of Electronics Instrument Engineering (APEIE) · 2014
The article presents a method of Graphics Processing Unit (GPU) implementation of Hidden Markov Models (HMM) for the task of multidimensional sequences classification. The execution times of method on Central Processing Unit (CPU) and GPU were compared.
Cited by 2
James Schloss, L. ORiordan · The Journal of Open Source Software · 2018
Cited by 15Open access
Siyuan Jing, Jun Yang · Journal of Experimental & Theoretical Artificial Intelligence · 2020
Recently, graphics processing unit (GPU) gained lots of attention from academia and industry for its applicability in high-performance computing. It has been successfully applied to many fields, such as image processing, machine learning, object detection, etc. In our previous work, GPU was adopted to accelerate the computation of rough set approximation (RSA), which is the core step in most of the rough sets based tasks, e.g. attribute reduction. The method is essentially a CPU-GPU cooperative paradigm. That is to say, there are lots of data exchanged between host memory and GPU memory, which greatly degrades the performance of the system. This paper introduces a unified GPU framework for parallel attribute reduction, in which two critical steps in attribute reduction, i.e. computation of equivalence class and attributes significance, are both executed on GPU. Moreover, the algorithm is well designed by exploiting the architectural characteristics of the modern GPU architecture. Experiments were carried out on data sets with different sizes. The results show that the proposed algorithm can outperform the CPU-GPU cooperative algorithm on large data sets.
Cited by 3
Xiaoyan Niu, Tieqiao Liu, Yujun Li · Journal of Communications Technology and Electronics · 2021
Aiming at the small delay defect (SDD) simulation, a graphics processing unit (GPU) accelerated SDD simulator based on the critical path tracing method is proposed. The proposed method considers the re-convergent sensitizations and hazard-based detections, which provides fast and accurate simulation results for small delay defects. Different simulation strategies are employed for different faults. For fault-effects fan-out re-convergent stems, the forward serial simulation is applied. For the other faults, the method of backward critical path tracing is used to quickly judge the testability. Different from the previous methods, the proposed method no longer focuses on whether the stem has a re-convergent path, but on whether the fault effects actually re-converge, thus effectively reducing the time of serial fault simulation. In addition, according to the characteristics of the simulation method and the circuit structure, the multi-dimensional acceleration of GPU is developed, including gate level parallel, fault parallel, pattern parallel, which further effectively speeds up the simulation. Experimental results show that the proposed SDD simulator can further accelerate the efficiency of the fault simulation. Compared with the serial simulation method, it can achieve an average acceleration of 154.53 times, and compared with the traditional critical path tracing method, it can achieve an average acceleration of 22.9 times.
Cited by 0
Hoonjong Kang, Fahri Yaraş, Levent Onural · Applied Optics · 2009
An approximation for fast digital hologram generation is implemented on a central processing unit (CPU), a graphics processing unit (GPU), and a multi-GPU computational platform. The computational performance of the method on each platform is measured and compared. The computational speed on the GPU platform is much faster than on a CPU, and the algorithm could be further accelerated on a multi-GPU platform. In addition, the accuracy of the algorithm for single- and double-precision arithmetic is evaluated. The quality of the reconstruction from the algorithm using single-precision arithmetic is comparable with the quality from the double-precision arithmetic, and thus the implementation using single-precision arithmetic on a multi-GPU platform can be used for holographic video displays.
Cited by 59
N. Gopalakrishna Kini, Ranjana Paleppady, Akshata K. Naik · Zenodo (CERN European Organization for Nuclear Research) · 2015
Password authentication is one of the widely used methods to achieve authentication for legal users of computers and defense against attackers. There are many different ways to authenticate users of a system and there are many password cracking methods also developed. This paper proposes how best password cracking can be performed on a CPU-GPGPU based system. The main objective of this work is to project how quickly a password can be cracked with some knowledge about the computer security and password cracking if sufficient security is not incorporated to the system.
Cited by 1Open access