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About 579 papers for “multiprogramming”
G. Scott Graham, Peter J. Denning · ACM SIGMETRICS Performance Evaluation Review · 1974
Dynamic multiprogramming memory management strategies are classified and compared using extant test data. Conclusions about program behavior are then drawn.
Cited by 4
Vasileios K. Barekas, Panagiotis Hadjidoukas, Eleftherios D. Polychronopoulos et al. · Scientific Programming · 2003
In this work, we present an OpenMP implementation suitable for multiprogrammed environments on Intel‐based SMP systems. This implementation consists of a runtime system and a resource manager, while we use the NanosCompiler to transform OpenMP‐coded applications into code with calls to our runtime system. The resource manager acts as the operating system scheduler for the applications built with our runtime system. It executes a custom made scheduling policy to distribute the available physical processors to the active applications. The runtime system cooperates with the resource manager in order to adapt each application′s generated parallelism to the number of processors allocated to it, according to the resource manager scheduling policy. We use the OpenMP version of the NAS Parallel Benchmark suite in order to evaluate the performance of our implementation. In our experiments we compare the performance of our implementation with that of a commercial OpenMP implementation. The comparison proves that our approach performs better both on a dedicated and on a heavily multiprogrammed environment.
Cited by 1Open access
Ivan Tanasić, Isaac Gelado, Javier Cabezas et al. · ACM SIGARCH Computer Architecture News · 2014
GPUs are being increasingly adopted as compute accelerators in many domains, spanning environments from mobile systems to cloud computing. These systems are usually running multiple applications, from one or several users. However GPUs do not provide the support for resource sharing traditionally expected in these scenarios. Thus, such systems are unable to provide key multiprogrammed workload requirements, such as responsiveness, fairness or quality of service. In this paper, we propose a set of hardware extensions that allow GPUs to efficiently support multiprogrammed GPU workloads. We argue for preemptive multitasking and design two preemption mechanisms that can be used to implement GPU scheduling policies. We extend the architecture to allow concurrent execution of GPU kernels from different user processes and implement a scheduling policy that dynamically distributes the GPU cores among concurrently running kernels, according to their priorities. We extend the NVIDIA GK110 (Kepler) like GPU architecture with our proposals and evaluate them on a set of multiprogrammed workloads with up to eight concurrent processes. Our proposals improve execution time of high-priority processes by 15.6x, the average application turnaround time between 1.5x to 2x, and system fairness up to 3.4x
Cited by 172
Biesbroeck, Stephan, Louvain, Katholieke Univ., Heverlee (Belgium). Faculteiten Wetenschappen en Toegepast Wetenschappen · OpenGrey (Institut de l'Information Scientifique et Technique) · 1988
Cited by 0
Jeffrey P. Buzen · 1980
Cited by 144
Jayadev Misra · Lecture notes in computer science · 1998
Cited by 2
MCKENNEY, JAMES LARRIMORE · Defense Technical Information Center (DTIC) · 1961
The main objective of this research is to study certain aspects of parallel processing, and in particular to make a preliminary estimate of the economic implications of parallel processing compared to serial processing. Parallel processing is defined as the simultaneous operation of two or more components of a system processing two or more different jobs. Serial processing is defined as operating a system upon one job at a time. The research was performed in four general phases: (1) a study of published research reports pertinent to parallel processing, (2) an analysis of five types of functioning (non-computer) parallel systems, (3) the development of the logical structure of an automatic process control system and a conceptual model of a parallel processor, and (4) computational simulations of the proposed parallel system to investigate its speed of operation relative to a modeled serial system. (Author)
Cited by 0
H. M. Gladney, G. Hochweller · 1976
Cited by 0
Marc Badel, Jacques Leroudier · Lecture notes in computer science · 1978
Cited by 1Open access
H. M. Gladney, G. Hochweller · ACM SIGARCH Computer Architecture News · 1976
A software system supporting multiple event-driven processes concurrently on a small process control computer is described. Each application can be programmed and tested independently. An implementation of the system, called LABS/7, has been productive for over three years. The limits to which real-time multiprogramming may be pushed are explored.
Cited by 0Open access
A. J. Critcklow · 1963
In this paper, the following definitions have been followed:
Cited by 33
Gries, David, Schneider, Fred B, Feijen, W H J · CERN Document Server (European Organization for Nuclear Research) · 1999
Cited by 0
Timothy Creech, Aparna Kotha, Rajeev Barua · 2013
As hardware becomes increasingly parallel and the avail-ability of scalable parallel software improves, the problem of managing multiple multithreaded applications (processes) becomes important. Malleable processes, which can vary the number of threads used as they run, enable sophisticated and flexible resource management. Although many existing ap-plications parallelized for SMPs with parallel runtimes are in fact already malleable, deployed run-time environments provide no interface nor any strategy for intelligently allo-cating hardware threads or even preventing oversubscrip-tion. Work up until SCAF either depends upon profiling applications ahead of time in order to make good decisions about allocations, or does not account for process efficiency at all. This paper presents the Scheduling and Allocation with Feedback (SCAF) system, a drop-in runtime solution which supports existing malleable applications in making intelligent allocation decisions based on observed efficiency without any paradigm change, changes to semantics, pro-gram modification, offline profiling, or even recompilation. Our existing implementation can control most unmodified OpenMP applications. Other malleable threading libraries can also easily be supported with small modifications, with-out requiring application modification. In this work, we present the SCAF daemon and a SCAF-aware port of the GNU OpenMP runtime. We demonstrate that applications running on the SCAF runtime still per-form well when executing on a quiescent system. We present a new technique for estimating process efficiency purely at runtime using available hardware counters, and demonstrate its effectiveness in aiding allocation decisions. We evaluated SCAF using NAS NPB parallel benchmarks. When run concurrently pairwise, 70 % of benchmark pairs on an 8-core Xeon processor saw improvements averaging 15% in sum of speedups compared to equipartitioning. For a 64-context Sparc T2 processor, 57 % of pairs saw a similar 15% improvement. The improvement was 45 % vs. equipartition-ing when three selected benchmarks were concurrently run.
Cited by 0
Jacques Leroudier, Dominique Potier · 1976
In this paper, we shall use the same analytical model to investigate the behaviour of the paging drum when the degree of multiprogramming is set to its optimal value. The main conclusion, which corroborates the general feeling on performance of virtual memory systems [3, 4, 5], is that drum utilization remains in the 50% range whenever CPU utilization is maximized, if no resource is saturated. The results are validated through simulation experiments in order to relax some theoretical assumptions used in the analytical model and to take into account some detailed mechanisms such as CPU overheads. As an application, an adaptive control algorithm based on the activity of the paging device is proposed. The algorithm has been simulated and comparisons with results reported in [2] are presented.Moreover, after investigations we show also that optimal performance can only be achieved through a balanced use of the different resources of the system. This conclusion cross-checks and extends Buzen's theoretical results [6] and Wulf's practical ones [7].
Cited by 15
Donald P. Gaver · Journal of the ACM · 1967
A probabilistic model is developed for a multiprogramming computer configuration, i.e., one in which several program segments are simultaneously in main memory (core). The model relates speed and number of input-output devices, core size, and central processor speed to central processor and system productivity. Incorporated in the model are parameters describing the statistical variability of input-output and central processor activities. Thus the model permits comparisons between systems loaded with different mixtures of job types (“scientific” vs. “business” applications). Numerical comparisons of various systems are provided.
Cited by 101Open access
Paul Jeffrey Prinster · 1970
Cited by 0
Adan, IJBF Ivo, Houtum, van, GJJAN Geert-Jan, Wessels, J Jaap et al. · TU/e Research Portal (Eindhoven University of Technology) · 1993
Cited by 0
LUIZ SERGIO PESTANA BASILIO · Portuguese National Funding Agency for Science, Research and Technology (RCAAP Project by FCT) · 1982
A multiprogamação caracteriza-se pelo compartilhamento dos \nrecursos da máquina por vários processos usuários. O \nambiente de computação propício para execução destes \nprocessos deve incluir dispositivos para relocação de \nendereços, proteção de memória, estados supervisor e \nusuário, e uma estrutura flexível de entrada e saída.\nA implementação de tais sistemas com microprocessadores de \n8 bits é problemática, devido ao seu desempenho aquém do \ndesejável para tal propósito.\nCom o INTEL 8086 iniciou-se a geração dos \nmicroprocessadores de 16 bits, com desempenho comparável \naos processadores de pequenos minicomputadores. Apesar \ndeste desempenho, esta partilha é voltada par as mesmas \naplicações dos microprocessadores de 8 bits: processamento \ndedicado e sistemas monoprogramados. Por isso não foram \nprevistos mecanismos de suporte à multiprogramação.\nEsta dissertação apresenta um microcomputador para \nmultiprogramação, baseado no INTEL 8086, em que várias \nfacilidades foram implementadas, por lógica externa, para \neste fim.\nSão descritos e analisados os vários dispositivos \ndesenvolvidos para que fosse criado um ambiente propício \npara multiprogramação sem que se deteriorasse o desempenho \ndo processador.\nEste trabalho recebeu auxílio do CNPq, processo nº \n40.2029180, como parte do projeto MULTIPUC.
Cited by 0Open access
H. N. Cantrell, A. L. Ellison · 1968
research-article Free Access Share on Multiprogramming system performance measurement and analysis Authors: H. N. Cantrell General Electric Company, Phoenix, Arizona General Electric Company, Phoenix, ArizonaView Profile , A. L. Ellison General Electric Company, Phoenix, Arizona General Electric Company, Phoenix, ArizonaView Profile Authors Info & Claims AFIPS '68 (Spring): Proceedings of the April 30--May 2, 1968, spring joint computer conferenceApril 1968 Pages 213–221https://doi.org/10.1145/1468075.1468108Published:30 April 1968Publication History 13citation109DownloadsMetricsTotal Citations13Total Downloads109Last 12 Months15Last 6 weeks4 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF
Cited by 40
Zijm, Willem H.M., Adan, I.J.B.F., Wessels, J. · University of Twente Research Information · 1993
Cited by 0