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About 7,601 papers for “parallel performance comparison”

Performance comparison of parallel fastICA algorithm in the PLGrid structures

Anna Gajos-Balińska, Grzegorz M. Wójcik, Przemysław Stpiczyński · ITM Web of Conferences · 2018

During processing the EEG signal, the methods of cleaning it from artifacts play an important role. One of the most commonly used methods is ICA (independent component analysis) [1-3]. However, algorithms of this type are computationally expensive. Known implementations of ICA type algorithms rarely include the possibility of parallel computing and do not use the capabilities provided by the architecture itself. This paper presents a parallel implementation of the fastICA algorithm using the available libraries and extensions of the Intel processors (such as BLAS, MKL, Cilk Plus) and compares the execution time for two selected architectures in the PLGrid structure (Zeus and Prometheus).

Cited by 2Open access

Investigation and Comparison of Kinetostatic Performance Indices for Parallel Mechanisms

Ott Sellis · DSpace repository (University of Tartu) · 2019

Nii kaua, kui on kasutusel olnud robotid, on käinud teadusuuringud nende kasutamiseks ning töö optimeerimiseks meie igapäevases elus. Samal ajal, kui meie teadmised robotite teemal on suuresti arenenud, on kasvanud ka vastavate struktuuride keerukus. Seega on arendatud mitmeid meetodeid ja indekseid, aitamaks disaneritel ning inseneridel välja selgitada parimad seadmed vastavate ülesannete lahendamiseks. Lisaks on huvi paralleelmehhanismide suunas viimaste aastate jooksul märgatavalt kasvanud. Peamiseks põhjuseks on paljudes valdkondades märgatavalt parem sooritusvõime võrreldes seriaalmanipulaatoritega. Ometi pole arendatud veel ühtegi globaalset jõudlusindeksit, mis võimaldaks täpsuse perspektiivis paralleelmanipulaatorite omavahelise võrdluse. Käesoleva lõputöö fookuseks on kintestaatilise jõuldusindeksi arendustööst ülevaate pakkumine. Uuritav indeks peab robustselt suutma hinnata läbi vastava indeksi paralleelmanipulaatorite täpsust.

Cited by 0Open access

Parallel particle rendering: a performance comparison between Chromium and Aura

Alan Heirich, Bruno Raffin, Luis Paulo Dos Santos (editors et al. · 2009

In the fields of high performance computing and distributed rendering, there is a great need for a flexible and scalable architecture that supports coupling of parallel simulations to commodity visualization clusters. The most popular architecture that allows such flexibility, called Chromium, is a parallel implementation of OpenGL. It has sufficient performance on applications with static scenes, but in case of more dynamic content this approach often fails. We have developed Aura, a distributed scene graph library, which allows optimized performance for both static and more dynamic scenes. In this paper we compare the performance of Chromium and Aura. For our performance tests, we have selected a dynamic particle system application, which reveals several issues with the Chromium approach of implementing the OpenGL API. Because our distributed scene graph architecture was designed with a different approach, the test results will show that it performs better on this application. 1.

Cited by 0

Performance Comparison between Serial-Connected and Parallel-Connected Photodiode Array

Jiarui Fei, Yongqing Huang, Tao Liu et al. · Conference on Lasers and Electro-Optics · 2017

Two-element serial-connected photodiode array (SC-PDA) and parallel-connected photodiode array (PC-PDA) were fabricated and tested. The novel PC-PDA shows a higher responsivity (0.32A/W), a smoother frequency response (14.0GHz) and a higher saturation current (66mA) comparing to the SC-PDA (0.24A/W, periodical patterned frequency response and 42mA).

Cited by 1

PERFORMANCE COMPARISON OF DOUBLE EFFECT LITHIUM BROMIDE/ WATER ABSORPTION CHILLERS: SERIES, PARALLEL AND REVERSE PARALLEL

L. Garousi Farshi, S.M. Seyed Mahmoudi · 2010

Reference # 11-16 Three classes of double effect Libr/water absorption refrigeration systems (series, parallel and reverse parallel) with identical refrigeration capacities are studied and compared. In order to simulate the performances of systems a new set of computationally efficient formulations for thermodynamic properties of Li-Br solution at equilibrium, is used. The results of simulation were used to study the influence of the various operating parameters such as HPG, evaporator, condenser temperatures and etc on the COP, maximum COP, optimum HPG temperature for maximum COP. In addition to these, the effects of effectiveness of solution heat exchangers, pressure drop between evaporator and absorber (Pdrop1), pressure drop between LPG and condenser (Pdrop2) and low grade heat externally supplied to LPG on the performance characteristics of the systems are investigated. The results can be useful in the design and control of these absorption systems, and also in comparing advantages and disadvantages of different configurations of double effect systems in identical conditions.

Cited by 0Open access

Parallel Reconfigurable Operator for Genomic Sequence Comparison: Architecture and Performance Analyses

Alexandre Cornu, Francois Dussaugey, Dominique Lavenier · HAL (Le Centre pour la Communication Scientifique Directe) · 2008

This document describes a parallel genomic sequence comparison operator for reconfigurable platforms. It has been implemented for speeding up the time consuming parts of the IRISA-TBLASTN program designed for comparing full genomes with large protein banks. Speed-up ranging from 25 to 200 has been measured on real genomic data.

Cited by 0Open access

Optical or Electrical Interconnects: Quantitative Comparison from Parallel Computing Performance View

Rentao Gu, Yaojun Qiao, Yuefeng Ji · 2008

This paper considers the comparison between optical and electrical interconnect system from a parallel computing performance view. The motivation of the work is based on increasing demand on parallel computing tasks and the rapid development of optical chip-to-chip interconnects techniques. To meet the increasing demand of large-scale parallel or multiprocessor computing tasks, an analytic method to evaluate the computing performance of interconnect systems is proposed in this paper. The bandwidth-limit model and full-bandwidth model are both under our investigation. The paper characterizes the influence of unit processing time, communication overhead, processor number and the transmission time. The speedup and efficiency are selected to represent the parallel performance of an interconnect system. The analytic expressions of these two indexes are derived in the paper. Deploying the proposed models, we depict the performance gap between the optical and electrical interconnect systems. Results show that the large communication bandwidth optical chip-to-chip system has an obvious speedup gain, which is up to 93%. However, the existence of efficiency peak point indicates that the immoderate pursuing of high-bandwidth have no use for system efficiency improvement.

Cited by 3

Performance analysis and comparison of parallel eigensolvers on Blue Gene architectures

Münchhalfen, J.F. · JuSER (Forschungszentrum Jülich) · 2013

The solution of eigenproblems with dense, symmetric system matrices is a core task in many felds of computational science and engineering. As the problem complexity and thus the size of the matrices involved increases, the application of distributed memory supercomputer architectures and parallel algorithms becomes inevitable. Nearly all modern algorithms for eigensolving implement a tridiagonal reduction of the eigenproblem system matrix and a subsequentsolution of the tridigonalized eigenproblem. Additionally, back transformation of the eigenvectors is required if these are of interest. In the context of this thesis, implementations of two basically different approaches to the parallelsolution of eigenproblems were benchmarked, reviewed and compared with particular regard to their performance on the Blue Gene/P and Blue Gene/Q supercomputers JUGENE and JUQUEEN at the Forschungszentrum Jülich: ELPA, which implements an optimized version of the divide and conquer algorithm and Elemental which utilizes the PMRRR implementation of the MR3 algorithm. ELPA features two fundamentally different kinds of tridiagonalization, the standard one-stage and a two-stage approach. The comparision of thetwo-stage to the direct reduction was a primary concern in the performance analysis.

Cited by 0Open access

A Performance Comparison of Parallel Genetic and Memetic Algorithms using MPI.

Jason Digalakis, Konstantinos Margaritis, K. G. Margaritis · 2000

In this paper we propose a parallel memetic algorithm which combines population-based method with guided local search (GLS) procedure. In the proposed algorithm, a GLS procedure is applied to each solution generated by genetic operations. The performance of proposed method compared with parallel genetic approaches (i.e. global model, migration model for GA). The parallel implementation is based on message passing interface (MPI).

Cited by 0

Comparison of the Dynamic Performance of Planar 3-DOF Parallel Manipulators

Guoning Si, Fahui Chen, Xuping Zhang · Machines · 2022

This paper presents a comprehensive comparison study on the dynamic performances of three planar 3-DOF parallel manipulators (PPMs): 3-RRR, 3-PRR, and 3-RPR. In this research work, the discrete time transfer matrix method (DT-TMM) is employed for developing dynamic models of the planar parallel manipulators. Numerical simulations using the virtual work principle and ADAMS 2016 software are performed to verify the DT-TMM dynamic model of PPMs. Numerous dynamic performance indices, including dynamic dexterity, the power requirement, energy transmission efficiency, and the joint force/torque margin, are proposed to compare the dynamic performance of three PPMs under the general circular and linear trajectories. The comprehensive analyses and comparisons show that: (1) the 3-RRR PPM has advantages in terms of a circular trajectory, offering the best dynamic dexterity performance, the smallest power requirement, and the second-highest energy transfer efficiency; (2) the 3-PRR PPM performs best in terms of a linear trajectory, offering the best dynamic dexterity, the smallest power requirement range, and the best drive performance; and (3) the 3-RPR PPM has the highest energy transfer efficiency and demonstrates better dynamic performance in a circular trajectory compared to a linear trajectory.

Cited by 6Open access

A comparison of data-parallel collective communication performance and its application

Yoshio Tanaka, Kazuki Kubota, Motohiko Matsuda et al. · 2002

Collective communications such as broadcast and reduction are commonly used in data parallel programs. It is important to understand the performance of such primitive communications to characterize parallel systems and analyze the performance of parallel applications running on specific parallel systems. We measured the performance of collective communication operations on several multiprocessor systems. In this paper, we report experimental results for collective communication performance on distributed memory systems. We also describe the performance prediction of data parallel programs using the performance of the primitives.

Cited by 1

Comparison of performance of the popular approaches to implementing parallel crawlers

Andriy Sultanov, Maksym Protsyk, Maksym Kuzyshyn et al. · 2021 IEEE 16th International Conference on Computer Sciences and Information Technologies (CSIT) · 2021

This research aims to compare the efficiency of the several popular parallel programming approaches used for an I/O-heavy workload: process pools, thread pools, and asynchronous I/O using the M:N model. As a model task, parallel Web crawlers were used, implemented using the C++ language. Their performance was measured using a wall-time approach. We tackled the inherent noise of this method using randomization and statistical hypothesis testing. The results of the experiment showed that all approaches are plausible for crawlers, though the epoll-based one is substantially faster than the two others and the thread-based is faster than the process-based.

Cited by 1

Performance Comparison of Prefetching and Placement Policies using Parallel I/O

K. K. Lee, M. Kallahalla, B. S. Lee et al. · 1997

. We present a simulation study of several prefetching policies to improve the I/O performance of external merging using parallel I/O. In particular we consider traditional sequential prefetch, forecast-based greedy prefetching, and oblivious prefetching. In conjunction with the prefetching policies we evaluate the benefit of two different data placement strategies: run-level striping and block-random placement, in the presence of data skew. We show that the I/O performance is greatly improved by using forecasting techniques. This method outperforms the other policies in achieving higher disk parallelism, and scales well with increased numbers of disks and increasing data skew. Additionally, the performance of block-random data placement is shown to be uniformly good, independent of the data skew, while the performance of run-level striped placement degrades with increasing skew. 1 Introduction The increasing imbalance between the speeds of processors and I/O devices has resulted in t...

Cited by 0

Parallel Program Performance Metrics: A Comparison and Validation", Supercomputing

Jeffrey K. Hollingsworth, Barton P. Miller · 1992

There are many metrics designed to assist in the performance debugging of large-scale parallel applica-tions. We describe a new technique, called True Zeroing, that permits direct quantitative comparison of the gui-dance supplied by these metrics on real applications. We apply this technique to three programs that include both numeric and symbolic applications. We compare three existing metrics: Gprof, Critical Path, and Quartz/NPT, and several new variations. Critical Path provided the best overall guidance, but it was not infallible. We also include a set of recommendations to tool builders based on the experience gained during our case study. 1.

Cited by 0

Performance comparison of parallel programming environment for its implementing AIAC algorithms

Jacques M. Bahi, Sylvain Contassot-vivier · 2004

AIAC algorithms (Asynchronous Iterations Asynchronous Communications) are a particular class of parallel iterative algorithms. Their asynchronous nature makes them more efficient than their syn-chronous counterparts in numerous cases as has already been shown in previous works. The first goal of this article is to compare several parallel programming environments in order to see if there is one of them which is best suited to efficiently implement AIAC algorithms. The main criterion for this comparison consists in the performances achieved in a global context of grid computing for two classical scientific problems. Nevertheless, we also take into account two secondary criteria which are the ease of program-ming and the ease of deployment. The second goal of this study is to extract from this comparison the important features that a parallel programming environment must have in order to be suited for the implementation of AIAC algorithms.

Cited by 0

Formal Definitions and Performance Comparison of Consistency Models for Parallel File Systems

Chen Wang, Kathryn Mohror, Marc Snir · IEEE Transactions on Parallel and Distributed Systems · 2024

The semantics of HPC storage systems are defined by the consistency models to which they abide. Storage consistency models have been less studied than their counterparts in memory systems, with the exception of the POSIX standard and its strict consistency model. The use of POSIX consistency imposes a performance penalty that becomes more significant as the scale of parallel file systems increases and the access time to storage devices, such as node-local solid storage devices, decreases. While some efforts have been made to adopt relaxed storage consistency models, these models are often defined informally and ambiguously as by-products of a particular implementation. In this work, we establish a connection between memory consistency models and storage consistency models and revisit the key design choices of storage consistency models from a high-level perspective. Further, we propose a formal and unified framework for defining storage consistency models and a layered implementation that can be used to easily evaluate their relative performance for different I/O workloads. Finally, we conduct a comprehensive performance comparison of two relaxed consistency models on a range of commonly seen parallel I/O workloads, such as checkpoint/restart of scientific applications and random reads of deep learning applications. We demonstrate that for certain I/O scenarios, a weaker consistency model can significantly improve the I/O performance. For instance, in small random reads that are typically found in deep learning applications, session consistency achieved a 5x improvement in I/O bandwidth compared to commit consistency, even at small scales.

Cited by 7Open access

Performance comparison of thrashing control policies for concurrent Mergesorts with parallel prefetching

Kun‐Lung Wu, Philip S. Yu, James Z. Teng · 1993

We study the performance of various run-time thrashing control policies for the merge phase of concurrent mergesorts using parallel prefetching, where initial sorted runs are stored on multiple disks and the final sorted run is written back to another dedicated disk. Parallel prefetching via multiple disks can be attractive in reducing the response times for concurrent mergesorts. However, severe thrashing may develop due to imbalances between input and output rates, thus a large number of prefetched pages in the buffer can be replaced before referenced. We evaluate through detailed simulations three run-time thrashing control policies: (a) disabling prefetching, (b) forcing synchronous writes and (c) lowering the prefetch quantity in addition to forcing synchronous writes. The results show that (1) thrashing resulted from parallel prefetching can severely degrade the system response time; (2) though effective in reducing the degree of thrashing, disabling prefetching may worsen the response time since more synchronous reads are needed; (3) forcing synchronous writes can both reduce thrashing and improve the response time; (4) lowering the prefetch quantity in addition to forcing synchronous writes is most effective in reducing thrashing and improving the response time.

Cited by 8Open access