High Performance Parallel Processing Simulator
S. Barros · Queen Mary Research Online (Queen Mary University of London) · 2013
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About 10,000 papers for “Parallel processing”
S. Barros · Queen Mary Research Online (Queen Mary University of London) · 2013
Cited by 0
Gede Indrawan, B. Sitohang, Shazia Akbar · 2011
Real time fingerprint identificatio non-alphanumeric content matching shouldn its speed factor. Real production-quality imp equipped with specific machine architectur factor. On this research, we focus on achievi common machine with respect to fingerprint a We explore the possibility to optimize fingerprint minutiae-based feature extract process. Hypothetically, in general using par faster than using sequential process. Tak multicore processor technology, optimization fingerprint feature extraction is conducted us by processor cores. We have identified implement parallel process on 29 different executed once or more. We compare result of average execution t feature extraction using parallel and sequenti of Database 1 of Fingerprint Verification Con 2004. The experiment confirms the hyp consistent result, i.e. faster about 57%, 55% tested database.
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R.B. Mueller-Thuns · Illinois Digital Environment for Access to Learning and Scholarship (University of Illinois at Urbana-Champaign) · 1990
Simulation has become indispensable in the process of designing, verifying, and testing complex digital systems because it is flexible and cost-effective. As the complexity of the designs grows the time and memory requirements of simulation increase and simulation can become a bottleneck. At the same time, parallel and distributed processing is becoming available and offers the potential of economical high performance computing. However, software and applications are lagging behind at this stage. The research reported in this thesis is motivated by both the increased need for simulation and the emergence of general purpose parallel computers. After reviewing previous work in the area of parallel simulation, we relate the issues of portability and scalability to our application and define a high-level process model view for parallel simulation. In the following, we report the results of two application studies. We first address parallel gate-level logic and fault simulation and then investigate parallel switch-level simulation; for both we introduce partitioning and simulation algorithms and present extensive performance evaluations. Directions for future research and an outlook for the future of parallel simulation conclude the thesis.
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Carretero, Jesus, Shende, Sameer, Garcia-Blas, Javier et al. · Lecture notes in computer science · 2024
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Bannink, AJ · TU/e Research Portal (Eindhoven University of Technology) · 1980
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Muhammad Illiyas Bin Sahalan, Muhammad Illiyas · UTPedia (Universiti Teknologi Petronas) · 2009
Parallel processing involves carrying computation of multiple tasks simultaneously. Ideally parallel processing aims at making completing a task faster; by breaking them into smaller divisions. Approach of parallelism varies, while in this project the idea of cache coherency is chosen for parallelism. The idea is to incorporate cache coherency in making multiple microprocessors/microcontroller working simultaneously. The available microprocessors/microcontroller to be used as the test subject is the 68HC11.
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Guenther, R., Kernforschungsanlage Juelich G.m.b.H. (KFA) (Germany). Zentralinstitut fuer Angewandte Mathematik · OpenGrey (Institut de l'Information Scientifique et Technique) · 1991
Available from TIB Hannover: RA831(2425) / FIZ - Fachinformationszzentrum Karlsruhe / TIB - Technische Informationsbibliothek
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Nagel, Wolfgang E., Goehringer, Diana, Diniz, Pedro C. · Lecture notes in computer science · 2025
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Roberto Gomperts, Paul K. Weiner · 1991
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Scott E. Fahlman · Parallel Computing · 1985
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Dominik Henrich, T. Honiger · 2002
This paper presents the different possibilities for parallel processing in robot control architectures. Initially, the authors briefly review the historic development of control architectures. Then, a list of requirements for control architectures is set up from a parallel processing point of view. As their main topic, they identify the levels of parallel processing in robot control architectures. With each level of parallelism, examples for a typical robot control architecture are presented. Finally, a list of keywords is provided for each previous work the authors refer to.
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Kyösti Rautiola, Tuomo Näyhä, Kari Kaarela · Microprocessing and Microprogramming · 1989
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Brett W. Vasconcellos · DSpace@MIT (Massachusetts Institute of Technology) · 2000
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.
Cited by 3Open access
N. Winterbottom · 1988
Cited by 1
Narsingh Deo · Defence Science Journal · 1985
Signal processing often requires a great deal of raw computing power for which it is important to take a look at parallel computers. The paper reviews various types of parallel computer architectures from the viewpoint of signal and image processing.
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Euro-Par 2020 Warschau; Online, M. Malawski, Krzysztof Rzaḑca · Lecture notes in computer science · 2020
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Turner, Peter · Lecture notes in mathematics · 1989
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Burkhard Monien, Oliver Vornberger · 1987
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Virgil Zeigler‐Hill, Todd K. Shackelford · 2020
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Roman Wyrzykowski, Ewa Deelman, Jack Dongarra et al. · Lecture notes in computer science · 2016
Cited by 26Open access