Lee, Chan Khong · DR-NTU (Nanyang Technological University) · 2015
Other than graphics processing abilities, GPU is widely used for general purpose computing nowadays because of its high parallel processing abilities. However, in order to utilize GPU as computation resources, there are prerequisites that the software needs to be programmed in a parallel manner which is more complex and expensive than in a serial manner. Many existing commercial video converter tools utilize CPU as the only computational resource for the video transcoding process. But occasionally the process can be very time-consuming, depending on the video size and the image quality that the user is pursuing. By bringing in GPU as a hardware-accelerated decoder, the whole process can be speedup by many times with lesser power consumed. As thread computing emerge, many in the industry start to shift the intensive computation part in video transcoding process from CPU and GPU, which brings a lot of performance improvement to the process. Everything seems perfect with the GPU acceleration transcoding until the rise of the dispute about the resulting image quality from a CPU-only software decoder and GPU-accelerated hardware decoder. Therefore this project will go deep into the basic concepts of GPU and video transcoding and examine the suitability for GPU as a hardware-accelerated decoder for video transcoding process.
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Ribeiro, Ricardo Alexandre do Rosário · Portuguese National Funding Agency for Science, Research and Technology (RCAAP Project by FCT) · 2019
In Bioinformatics, finding the complex resulting from an interaction between a pair of proteins is a computationally demanding task. There are methods and algorithms that simulate the binding between two proteins. However, the computation related to docking simulation has many extensive and repeating steps. Thus, the execution of the simulation if the program is CPU-only can last for hours, making the option of using these programs a very inefficient one in terms of work/time. One of the methods used is BiGGER, created by prof. Nuno Palma and others. This algorithm has features that give it a lower time complexity compared to others, therefore execution times in BiGGER can be lower than most of the algorithms fitted for execution of docking simulations. Studying protein interactions has medical aplications, contributing to the development of ways to protect, diagnose and heal humanity from neuronal diseases. It also contributes to computer assisted drug design and development. To improve the execution time of docking programs, these were optimized for GPU execution, reducing the execution time in docking scenarios that can last for hours to minutes or even seconds. This document presents an aproach to the implementation of optimizations to BiGGER, running it with GPU assistance. This implementation is to be done via high performance computing techniques, so that the machine’s GPU assists the CPU on parallelizing those required computations. By having more resources at disposal, it should be expected that the execution time of BiGGER is reduced due to the improvement of BiGGER performance in relation to the sequential version. If the implementations succeed, there will be additional advantages for BiGGER in relation to other algorithms. Thus, a value proposition is given for those who intend to use BiGGER as a method for efficiently studying interactions between proteins in a personal ou professional computer.
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A. Badalov, Daniel Cámpora, N. Neufeld et al. · Journal of Instrumentation · 2016
The LHCb detector is due to be upgraded for processing high-luminosity collisions, which will increase data bandwidth to the event filter farm from 100 GB/s to 4 TB/s, encouraging us to look for new ways of accelerating Online reconstruction. The Coprocessor Manager is a new framework for integrating LHCb's existing computation pipelines with massively parallel algorithms running on GPUs and other accelerators. This paper describes the system and analyzes its performance.
Cited by 3Open access
Potěšil, Josef · Brno University of Technology Digital Library (Brno University of Technology) · 2011
The reader will be familiar with selected concepts of cryptography consited in this work. AES algorithm was selected in conjunction with the description of architecture and software for programming graphic cards (CUDA, OpenCL), in order to create its GPU-accelerated version. This thesis tries to map APIs for communication with crypto-coprocessors, which exist in kernels of Linux/BSD operating systems (CryptoAPI, OCF). It examines this support in the cross-platform OpenSSL library. Subsequently, the work discusses the implementation details, achieved results and integration with OpenSSL library. The conclusion suggests how the developed application could be used and briefly suggests its usage directly by the operating system kernel.
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Pablo G. Cremades; Grupo de Estudios Atmosféricos y Ambientales, Universidad Tecnológica Nacional, Facultad Regional Mendoza,, Enrique S. Puliafito; Grupo de Estudios Atmosféricos y Ambientales, Universidad Tecnológica Nacional, Facultad Regional Mendoza,, Rafael P. Fernandez; Grupo de Estudios Atmosféricos y Ambientales, Universidad Tecnológica Nacional, Facultad Regional Mendoza, · Mecánica Computacional (Asociación Argentina de Mecánica Computacional) · 2010
Weather and climate prediction, as well as air quality software models are very computing intensive, requiring high processing power in order to achieve precise results in a reasonable time. For many years, performance improvement has come from increasing processors speed. However, processor speed cannot be indefinitely increased. An alternative strategy for increasing performance is through the use of large-scale parallelism architectures. While recent models show the benefits of parallel computing, multicore systems or cluster may be cost ineffective in certain scenarios. CUDA (Compute Unified Device Architecture) is a general purpose parallel architecture introduced by NVIDIA®. CUDAenabled graphics processing units have hundreds of cores that can collectively run thousands of threads at a fraction of a cost of other parallel computer classes. This paper shows the performance improvement achievable in CALPUFF, an advanced nonsteady-state meteorological and air quality modeling system, through parallelization and CUDA computing architecture. A runtime analysis of the model was conducted in order to find a candidate module for parallelization. Results from the optimized version are compared to those from original serial version of CALPUFF for error analysis.
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Niklas Eiling, M. Kröning, Jonathan Klimt et al. · 2023
Today, large compute clusters increasingly move towards heterogeneous architectures by employing accelerators, such as GPUs, to realize ever-increasing performance. To achieve maximum performance on these architectures, applications have to be tailored to the available hardware by using special APIs to interact with the hardware resources, such as the CUDA APIs for NVIDIA GPUs. Simultaneously, unikernels emerge as a solution for the increasing overhead introduced by the complexity of modern operating systems and their inability to optimize for specific application profiles. Unikernels allow for better static code checking and enable optimizations impossible with monolithic kernels, yielding more robust and faster programs. Despite this, there is a lack of support for using GPUs in unikernels. Due to the proprietary nature of the CUDA APIs, direct support for interacting with NVIDIA GPUs from unikernels is infeasible, resulting in applications requiring GPUs being unsuitable for deployment in unikernels.
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Eiling, Niklas, Kröning, Martin, Klimt, Jonathan Christoph et al. · RWTH Publications (RWTH Aachen) · 2023
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Jingshen Li · Proceedings of the 2nd International Conference on Computer Science and Electronics Engineering (ICCSEE 2013) · 2013
In digital image processing, Fourier transform is an important algorithm of image transformation. In order to improve the speed of Fourier transform, the paper proposes to deal with the image with GPU parallel computing through the method of GPU accelerating MATLB. The relationship of data scale and calculation speed is analyzed through the traditional CPU serial operation and GPU parallel computing. Computer simulations verify that the calculation speed can be improved by GPU about large scale data.
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Jing Shen Li · Applied Mechanics and Materials · 2013
In digital image processing, Fourier transform is an important algorithm of image transformation. In order to improve the speed of Fourier transform, the paper proposes to deal with the image with GPU parallel computing through the method of GPU accelerating MATLB. The relationship of data scale and calculation speed is analyzed through the traditional CPU serial operation and GPU parallel computing. Computer simulations verify that the calculation speed can be improved by GPU about large scale data.
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Haolei Ye, Eric McCreath · 2018
Free Lossless Audio Codec (FLAC) format is a widely used format for audio storage. Using a lower performance single threaded approach, FLAC is easily decoded faster than the rate at which it is played at. However, if you wish to transcode or edit long FLAC audio files then decoding times using single thread CPU approaches becomes significant. The FLAC format contains a sequence of frames, these frames vary in size so start locations are unknown until the previous frame is decoded. This complicates parallelizing decoding. However, frames start with known fixed bit patterns and each frame contains a frame index, it is possible to locate and decode frames in parallel. In this paper, we present an approach that exploits this characteristic enabling all the frames to be decoded in parallel. This approach is implemented and evaluated using an NVIDIA GeForce GTX 1080 graphics card showing a 5 times performance improvements than the widely used official implementation running on an Intel CoreTM i7-6770K CPU.
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Dos Santos Fernandes, Nuno · CERN Document Server (European Organization for Nuclear Research) · 2024
The Topological Cluster algorithm is the most expensive part of calorimeter reconstruction and the 16th most computationally demanding algorithm in the High Level Trigger. In anticipation of the challenges that the High Luminosity LHC will bring, an effort to assess the feasibility of employing Graphical Processing Units (GPUs) to accelerate this algorithm has been going on for the past few years, relying on a parallel-friendly variant we have called Topo-Automaton Clustering. The current prototype is now currently fully integrated within the Athena framework that is used for both offline and online analysis of ATLAS data (though the integration with the High Level Trigger is still to be completed), and offers full feature parity with the CPU implementation that is currently in use. The differences that remain between the CPU and GPU algorithms are understood and, if the criteria used for cluster creation are consistent between both, the resulting clusters contain exactly the same cells. The latest benchmarks point towards a speed-up of around 6 for ttbar events and 10 for di-jets, for a combined benchmarking of the three main stages of topological clustering (cluster growing, cluster splitting and cluster moments calculation); however, more than half of the total processing time is due to the overhead of converting between the data structures used currently within the Athena framework and the GPU data representation that ensures maximum performance. The poster will provide an overview of the current status of the project, including the algorithm itself, the implementation, some comparisons for physical validation and the aforementioned benchmarks, as well a brief outlook of future development and improvements.
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Chuan-Hsiang Han · WORLD SCIENTIFIC eBooks · 2025
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Qian Kemao, Tianyi Wang · SPIE eBooks · 2017
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Tsai, HsinYing · Zenodo (CERN European Organization for Nuclear Research) · 2025
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Yutaka Endo · 2023
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Hába, Jiří · Brno University of Technology Digital Library (Brno University of Technology) · 2020
Tato práce se zaměřuje na výstavbu oktalového stromu pro trojrozměrné trojúhelníkové modely na grafickém hardware. Tato akcelerační struktura byla zvolena na základě porovnání nejčastěji užívaných akceleračních struktur. Přístup ke stavbě této struktury vychází ze způsobu výstavby z ní odvozeného řídkého voxelového oktalového stromu. Při procesu je využívána voxelizace urychlovaná vykreslovacím řetězcem grafické karty. K usnadnění práce a umožnění začlenění navrhovaného postupu do v budoucnu vznikajících aplikací je součástí této práce i návrh knihovny jazyka C++.
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Evangeline F. Y. Young · 2023
Placement and routing are essential steps in physical synthesis of VLSI designs. Modern circuits contain billions of cells and nets, which significantly increases the computational complexity of physical synthesis and brings big challenges to leading-edge physical design tools. With the fast development of GPU architecture and computational power, it becomes an important direction to explore speeding up physical synthesis with massive parallelism on GPU. In this talk, we will look into opportunities to improve EDA algorithms with GPU acceleration. Traditional EDA tools run on CPU with limited degree of parallelism. We will investigate a few examples of accelerating some classical algorithms in placement and routing using GPU. We will see how one can leverage the power of GPU to improve both quality and computational time in solving these EDA problems.
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Lorenc, David · Brno University of Technology Digital Library (Brno University of Technology) · 2023
In this bachelor thesis, I will deal with the acceleration of the Breadth-first search (BFS) algorithm on a graphics card. This is an algorithm designed to traverse the graph in breadth. I will explain the basic parallelization techniques divided according to Flynn’s classification. I will also discuss the existing methods of parallelizing BFS on GPU. I will then perform structured experiments of all approaches on the same dataset, compare and evaluate the results. It is very difficult for someone new to the field to navigate through it, due to its vastness, I wanted to create a work that will guide a programmer new to parallelization on GPUs and give them an easier insight into the subject. Furthermore, I focused on structured testing of different approaches from different works and evaluated them for the sake of reviewing the performance of the approaches in one place. Thus, the reader can see which one is most suitable for his/her need. A clear explanation of the theory behind parallelization techniques and problems, and a description of the hardware and software concepts of NVDIA Cuda. An introduction to the possibilities of representing graphs in memory and an explanation of why graph representation using a neighborhood list is used. Description of the different approaches and their testing, based on the results of the evaluation of the effectiveness of the approaches.
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Szilárd Páll · Figshare · 2014
Control and data-flow of the heterogeneus parallelization in GROMACS 4.6. The diagram illustrates both normal MD steps (black lines) as well as those steps in which the pair-search and domain-decomposition is carried out (blue). In the latter, the additional transfer of the pair list from the CPU to the GPU and a subsequent pruning done in the CUDA kernel is also indicated.
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Vinco, Sara, Debapriya Chatterjee, Bertacco, Valeria et al. · PORTO Publications Open Repository TOrino (Politecnico di Torino) · 2012
SystemC is a widespread language for HW/SW system simulation and design exploration, and thus a key development platform in embedded system design. However, the growing complexity of SoC designs is having an impact on simulation performance, leading to limited SoC exploration potential, which in turns affects development and verification schedules and time-to-market for new designs. Previous efforts have attempted to parallelize SystemC simulation, targeting both multiprocessors and GPUs. However, for practical designs, those approaches fall far short of satisfactory performance. This paper proposes SAGA, a novel simulation approach that fully exploits the intrinsic parallelism of RTL SystemC descriptions, targeting GPU platforms. By limiting synchronization events with ad-hoc static scheduling and separate independent dataflows, we shows that we can simulate complex SystemC descriptions up to 16 times faster than traditional simulators
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