Jerram, Paul, Stefanov, Konstantin · Open Research Online (The Open University) · 2017
A CCD image sensor of the type for providing charge multiplication by impact ionisation has an image area and a plurality of pixels. A separate multiplication register has a plurality of multiplication elements arranged to receive charge from the pixels of the image area. Each multiplication element comprises a sequence of electrodes operable to cause multiplication, the electrodes of each multiplication element being adjacent one another and non-overlapping. The non-overlapping arrangement may be manufactured by a CMOS process thereby providing a CCD image sensor with the advantages of CCD multiplication but using a CMOS manufacturing process.
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Bol, David, Numa Couniot · Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)) · 2017
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Stefanov, Konstantin, Holland, Andrew · Open Research Online (The Open University) · 2017
An image sensor of the type for providing charge multiplication by impact ionisation has plurality of multiplication elements. Each element is arranged to receive charge from photosensitive elements of an image area and each element comprises a sequence of electrodes to move charge along a transport path. Each of the electrodes has an edge defining a boundary with a first electrode, a maximum width across the charge transport path and a leading edge that defines a boundary with a second electrode, the leading edge having one or more changes of direction so that the length of the edge is greater than the maximum width of the charge multiplication electrode across the charge transport path. Various arrangements with such changes of direction are provided including a zigzag saw-tooth arrangement, a castellated arrangement and a triangular arrangement.
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Trevisi, Marco, Carmona-Galán, R., Rodríguez-Vázquez, Ángel · DIGITAL.CSIC (Spanish National Research Council (CSIC)) · 2018
The invention relates to an image sensor (100) with "on-chip" compressive sensing for capturing, understanding and transmitting entire images. More specifically, the invention relates to an image sensor (100) comprising: a pixel matrix (5) with rows and columns, for converting incident light into an electrical signal; a first circuit for generating a pseudo-random sequence of binary numbers, which selects the pixels to be compressed; second and third circuits for receiving the selection signal (4) for each pixel and, for each compressed pixel, generating pulse-frequency coding of the value of the pixel; and a fourth circuit which receives the pulse-frequency coding of the value of the pixel for each compressed pixel, in order to obtain a compressed digital signal for the entire image. [EN]
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Bol, David, Numa Couniot · Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)) · 2017
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NTUR (臺灣機構典藏) · 1994
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CIANCAGLIONI I., COLACE L., MASINI G. et al. · IRIS Research product catalog (Sapienza University of Rome) · 1999
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Simon Li, Yue Fu · 2011
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Displays · 1980
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François Berry, Omar Ait Aider · HAL (Le Centre pour la Communication Scientifique Directe) · 2013
International audience
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Sabrina E. Kemeny, Roger Panicacci, Bedabrata Pain et al. · 1997
Abstract-The recent development of the CMOS active pixel sensor (APS) has, for the first time, pennitted large scale integration of supporting circuitry and smart camera functions on the same chip as a high-performance image sensor. This paper reports on the demonstration of a new 128 x 128 CMOS APS with programmable multiresolution readout capability. By placing signal processing circuitry on the imaging focal plane, the image sensor can output data at varying resolutions which can decrease the computational load of downstream image processing. For instance, software intensive image pyramid reconstruction can be eliminated. The circuit uses a passive switched capacitor network to average arbitrarily large neighborhoods of pixels which can then be read out at any user-defined resolution by configuring a set of digital shift registers. The full resolution frame rate is 30 Hz with higher rates for all other image resolutions. The sensor achieved 80 dB of dynamic range while dissipating only 5 mW of power. Circuit error was less than-34 dB and introduced no objectionable fixed pattern noise or other artifacts into the image. Index Terms- Focal plane array, image processing, imager, multimedia, sensor. 1.
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François Berry, Omar Ait Aider · 2012
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Yuhao Zhu · Synthesis lectures on computer architecture · 2026
This chapter discusses image sensors, the devices that transform optical signals to electrical signals. We start from the basic principle that governs this signal transduction inside a pixel and then discuss how pixels are architected together to form an image sensor. We then turn to various in-sensor optics, which are not necessarily important for forming images but are important for forming visually pleasing images that, for instance, have realistic colors and are free of aliasing effects.
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I. Ciancaglioni, Lorenzo Colace, Gérald Masini et al. · 1999
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Displays · 1992
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nasa, Philco-Ford Corp. · 2014
Video image data transmission using millimeter wave relay satellites - image sensor systems
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Tiyou Zhou · IEEE DataPort · 2026
"Data quality constitutes the upper bound of model performance in scientific vision tasks. Prevailing datasets frequently resort to simplified additive Gaussian noise models, which fail to encapsulate the non-stationary and spatially correlated noise characteristics intrinsic to on-orbit CMOS sensors (e.g., stray light noise, random telegraph noise, row\/column fixed pattern noise). To bridge this domain gap, we introduce HiFAHS, a dual-mode simulation framework designed to synthesize training data with extreme physical realism. The pipeline operates through two complementary streams: a physics-based optoelectronic modeling engine (Type-A) and a hybrid augmentation system utilizing authentic sensor substrates (Type-B). Unlike traditional denoising benchmarks that treat noise as a superficial additive layer, the Type-A pipeline simulates the complete photon-to-electron transfer chain. This process is rigorously structured into three sequential phases: Scene Initialization, Optical Rendering, and Optoelectronic Degradation."
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Boukhayma, Assim, Peizerat, Arnaud · Infoscience (Ecole Polytechnique Fédérale de Lausanne) · 2016
A CMOS image sensor including a pixel including: a photodiode in series with a MOS transistor between a first reference potential and a sense node; a MOS transistor connecting the sense node to a second reference potential; and a third MOS transistor assembled as a source follower between the sense node and a read circuit, wherein the oxide thickness of the third transistor is smaller than that of the first and second transistors, the voltage difference between the first and second reference potentials is greater than the maximum voltage capable of being applied between two terminals of the third transistor, and the body or drain region of the third transistor is connected to a third reference potential in the range between the first and second potentials. - See more at: http://www.patentbuddy.com/Patent/20160013238#sthash.8KpPKnhw.dpuf
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Boukhayma, Assim, Peizerat, Arnaud · Infoscience (Ecole Polytechnique Fédérale de Lausanne) · 2016
A CMOS image sensor including a pixel including: a photodiode in series with a MOS transistor between a first reference potential and a sense node; a MOS transistor connecting the sense node to a second reference potential; and a third MOS transistor assembled as a source follower between the sense node and a read circuit, wherein the oxide thickness of the third transistor is smaller than that of the first and second transistors, the voltage difference between the first and second reference potentials is greater than the maximum voltage capable of being applied between two terminals of the third transistor, and the body or drain region of the third transistor is connected to a third reference potential in the range between the first and second potentials. - See more at: http://www.patentbuddy.com/Patent/20160013238#sthash.8KpPKnhw.dpuf
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Stefanov, Konstantin · Open Research Online (The Open University) · 2015
A CMOS image sensor 101 comprises an active layer 11 of a first conductivity type arranged to be reversed biased and a pixel 20 comprising a photosensitive element comprising a well 22 of a second conductivity type and a well 21 of the first conductivity type containing active CMOS elements for reading and resetting the photosensitive element. The CMOS image sensor further comprises a doped buried layer 111 of the second conductivity type in the active layer beneath the well of the first conductivity type. The buried layer is arranged to extend a depletion region below the well of the second conductivity type also below the well of the first conductivity type.
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