Tiago Rodrigo Kepe, Eduardo Cunha de Almeida, Marco A. Z. Alves · Proceedings of the VLDB Endowment · 2019
The rapid growth of "big-data" intensified the problem of data movement when processing data analytics: Large amounts of data need to move through the memory up to the CPU before any computation takes place. To tackle this costly problem, Processing-in-Memory (PIM) inverts the traditional data processing by pushing computation to memory with an impact on performance and energy efficiency. In this paper, we present an experimental study on processing database SIMD operators in PIM compared to current x86 processor (i.e., using AVX512 instructions). We discuss the execution time gap between those architectures. However, this is the first experimental study, in the database community, to discuss the trade-offs of execution time and energy consumption between PIM and x86 in the main query execution systems: materialized, vectorized, and pipelined. We also discuss the results of a hybrid query scheduling when interleaving the execution of the SIMD operators between PIM and x86 processing hardware. In our results, the hybrid query plan reduced the execution time by 45%. It also drastically reduced energy consumption by more than 2x compared to hardware-specific query plans.
Cited by 21
Soren Fischbach, Thomas Carew · Neuron · 2009
Cited by 27Open access
Roman Kaplan, Leonid Yavits, Ran Ginosar · Supercomputing Frontiers and Innovations · 2017
Near-data in-memory processing research has been gaining momentum in recent years. Typical processing-in-memory architecture places a single or several processing elements next to a volatile memory, enabling processing without transferring data to the host CPU. The increased bandwidth to and from volatile memory leads to performance gain. However processing-in-memory does not alleviate von Neumann bottleneck for big data problems, where datasets are too large to fit in main memory. We present a novel processing-in-storage system based on Resistive Content Addressable Memory (ReCAM). It functions simultaneously as a mass storage and as a massively parallel associative processor. ReCAM processing-in-storage resolves the bandwidth wall by keeping computation inside the storage arrays, without transferring it up the memory hierarchy. We show that ReCAM based processing-in-storage architecture may outperform existing processing-in-memory and accelerator based designs. ReCAM processing-in-storage implementation of Smith-Waterman DNA sequence alignment reaches a speedup of almost five over a GPU cluster. An implementation of in-storage inline data deduplication is presented and shown to achieve orders of magnitude higher throughput than traditional CPU and DRAM based systems.
Cited by 3Open access
Amir Morad, Leonid Yavits, Ran Ginosar · ACM Transactions on Architecture and Code Optimization · 2015
GP-SIMD, a novel hybrid general-purpose SIMD computer architecture, resolves the issue of data synchronization by in-memory computing through combining data storage and massively parallel processing. GP-SIMD employs a two-dimensional access memory with modified SRAM storage cells and a bit-serial processing unit per each memory row. An analytic performance model of the GP-SIMD architecture is presented, comparing it to associative processor and to conventional SIMD architectures. Cycle-accurate simulation of four workloads supports the analytical comparison. Assuming a moderate die area, GP-SIMD architecture outperforms both the associative processor and conventional SIMD coprocessor architectures by almost an order of magnitude while consuming less power.
Cited by 42Open access
Dufy Teguia, Jiaxuan Chen, Stella Bitchebe et al. · SPIRE - Sciences Po Institutional REpository · 2024
Data movement is the leading cause of performance degradation and energy consumption in modern data centers. Processing inmemory (PIM) is an architecture that addresses data movement by bringing computation inside the memory chips. This paper is the first to study the virtualization of PIM devices by designing and implementing vPIM, an open-source UPMEM-based virtualization system for the cloud. Our vPIM design considers four requirements: Compatibility such that no hardware and no hypervisor changes are needed; Multiplexing and isolation for a higher utilization ratio; Utilizability and transparency such that applications written for PIM can be efficiently run out-of-the-box, leading to rapid adoption; Minimalization of virtualization performance overhead.
Cited by 8Open access
K Oberauer, R Kliegl · Explore Bristol Research · 2004
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Juanita A Smith, Robert G. Knight · Neuropsychologia · 2002
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Daniel Béracochéa, Georges Chapouthier · Neural Plasticity · 2005
This article has no abstract.
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William Johnston · 1972
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Daichi Fujiki, Alireza Khadem, Scott Mahlke et al. · 2022
In-memory computing provides revolutionary changes to computer architecture by fusing memory and computation, allowing data-intensive computations to reduce data communications. Despite promising results of in-memory computing in each layer of the memory hierarchy, an integrated approach to a system with multiple computable memories has not been examined. This paper presents a holistic and application-driven approach to building Multi-Layer In-Memory Processing (MLIMP) systems, enabling applications with variable computation demands to reap the benefits of heterogeneous compute resources in an integrated MLIMP system. By introducing concurrent task scheduling to MLIMP, we achieve improved performance and energy efficiency for graph neural networks and multiprogramming of data parallel applications.
Cited by 9
Donna E. West · Chinese Semiotic Studies · 2018
Abstract The hitherto unrecognized task of Empirical Semiotics is to identify particular testing procedures which measure qualitative differences in how representations are processed. Elicited imitation (EI) can indicate the nature of the interpretants which hold between sign and object by tapping how meanings are processed in working memory (WM). The way in which linguistic forms are handled in WM reveals striking distinctions between interpretants which express a proposition, as opposed to those which are simply diagrammatic in nature. EI is the soundest method (compared to natural speech, grammatical judgments) to measure qualitative semiotic advances because it measures meaning changes accorded to the sign in WM. Subjects were instructed to provide word associations after each stimulus (twenty-four sentences) to guard against verbatim recall. Repetitions of the advanced groups more often contained meaningful substitutions (words/inflections), whereas word deletions were more often documented in the beginner groups. Findings indicate the propensity of the more advanced L2s to process signs as meaningful propositions – lower proficiency learners illustrating verbatim repetitions in Secondness (associating more diagrammatic interpretants), while more symbolic meanings surfaced (Thirdness) in advanced groups. The EI procedure constitutes the best method of tapping L2s interpretants which mediate sign–object relations.
Cited by 4
Donghyuk Kim, Joo-Young Kim · 2012
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Laird S. Cermak, Fergus I. M. Craik · Psychology Press eBooks · 2014
As a conceptual framework for the investigation of human memory, the levels-of-processing paradigm had enjoyed immense popularity since its introduction in the early 1970s. It was the impetus behind literally hundreds of experiments and was used as an "explanation" for a wide range of retention phenomena. Consequently, a wealth of data and theory had emerged, and this title assimilates and evaluates this information. Originally published in 1979, the distinguished contributors to the volume – both proponents and opponents of the levels-of-processing framework – present here their latest data and ideas on a viewpoint that has been a tremendous influence in memory research and related areas.
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Dmitri Korotkevitch · Apress eBooks · 2016
This chapter discusses transaction processing in In-Memory OLTP. It elucidates which isolation levels are supported by technology, talks about the lifetime of In-Memory OLTP transactions, and explains how In-Memory OLTP addresses concurrency phenomena encountered in the database systems. Finally, this chapter provides an overview of transaction logging in In-Memory OLTP.
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Bulgu, Bulut, Sakellariou, Antonia · KTH Publication Database DiVA (KTH Royal Institute of Technology) · 2023
Many of the modern problems in computing are, due to their nature, memory-bound. This essentially means that adding more and more computing power, ie., more and faster CPUs, would not allow them to run faster, as one would expect since the bottleneck is the movement of the data from memory to the CPU, which can also be costly in terms of energy consumption. This thesis investigates a collection of ideas that aim to efficiently tackle such problems, such as the Massive Memory Machine, its successor DataScalar architectures, Processing in Memory architectures, and Memory interleaving. The thesis describes an attempt to implement the Massive Memory Machine on the Champsim simulator. It also explains why the DAMOV simulator and UPMEM PIM architecture can not support the Massive Memory Machine, due to lack of communication provided between CPUs. The Massive Memory Machine improved the performance of the programs that were tested. Although the performance did not scale linearly with the number of CPUs added, it improved sufficiently.
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Wessam Hassanein · Purdue e-Pubs (Purdue University System) · 2004
As the gap between processor and memory speeds widens, program performance is increasingly dependent on the memory access latency. Prefetching is a common technique to hide latency and has traditionally been based upon prediction. However, memory-bound applications have large data working sets and complex data access patterns that defy address prediction. Precomputation-based prefetching overcomes the prediction drawbacks by pre-executing the code that generates complex irregular addresses. Precomputation can occur either on the processor side or on the memory side. Precomputation on the memory side has the advantage of low memory access latency and avoids the increase in fetch and execution resource contention typical of precomputation mechanisms on the processor side. This thesis presents concepts and implementation of new techniques that use Processing-In-Memory (PIM) to hide the memory access latency. We introduce a hybrid software/hardware approach for memory side precomputation. The proposed design keeps low hardware complexity on the processor side while achieving high performance. We propose a novel compiler algorithm that selects precomputation slices for speculative pre-execution in memory. Our approach uses static slice selection to avoid the associated hardware cost. The algorithm is fully automated, allows fine tuning of the constructed slices, and avoids the use of extensive profiling feedback for slice construction common in precomputation techniques. On the hardware side, we propose new approaches for dynamic slice filtering, slice prioritization based on Earliest Deadline First scheduling, and data forwarding from the memory to the processor side. To evaluate the performance of the proposed techniques we built a cycle-accurate PIM simulator of an aggressive out-of-order processor with accurate simulation of bus and memory contention. The performance study, using SPEC CPU2000 and Olden benchmarks, demonstrates the efficiency of the proposed techniques in terms of speedup and reduction in the average load access latency. The results show a performance gain of up to 2.04 (1.32 on average) over an aggressive superscalar processor. The average load access latency decreases by up to 71% (37% on average).
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Guowei Yang, Cansu Demirkiran, Zeynep Ece Kizilates et al. · 2023
Today's Deep Neural Network (DNN) inference systems contain hundreds of billions of parameters, resulting in significant latency and energy overheads during inference due to frequent data transfers between compute and memory units. Processing-in-Memory (PiM) has emerged as a viable solution to tackle this problem by avoiding the expensive data movement. PiM approaches based on electrical devices suffer from throughput and energy efficiency issues. In contrast, Optically-addressed Phase Change Memory (OPCM) operates with light and achieves much higher throughput and energy efficiency compared to its electrical counterparts. This paper introduces a system-level design that takes the OPCM programming overhead into consideration, and identifies that the programming cost dominates the DNN inference on OPCM-based PiM architectures. We explore the design space of this system and identify the most energy-efficient OPCM array size and batch size. We propose a novel thresholding and reordering technique on the weight blocks to further reduce the programming overhead. Combining these optimizations, our approach achieves up to 65.2 × higher throughput than existing photonic accelerators for practical DNN workloads.
Cited by 18
Hai Li, Alaa R. Alameldeen, Onur Mutlu · IEEE Design and Test · 2022
The rapid explosion in data-intensive applications is posing unprecedented demand for superior data-processing capabilities. With the end of Dennard scaling, the benefits of conventional approaches of moving stored data to processing cores and enhancing the computing capability of these cores through technology scaling have diminished. At the same time, advancements in new material and integration technologies have made the old concept of coupling compute units to memory more viable.
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Partha Pratim Pande · IEEE Design and Test · 2022
The articles in this issue are divided into three groups: 1) the first group belongs to a special issue (SI) covering selected articles from the 33rd Symposium on Integrated Circuits and Systems Design (SBCCI 2020); 2) SI on Near-Memory and In-Memory Processing; and 3) general interest articles.
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Pinar Kurdoglu-Ersoy, Yildirim, Bugay, Tekozel, Mert et al. · Open Science Framework · 2021
The survival processing effect is the finding of better memory for items processed in terms of survival relevance than those processed in non-survival contexts (Nairne et al., 2007). While the survival processing advantage is known to be robust, the effects of alternative fitness-related domains on memory are not as extensively studied as the survival processing. In the present study, we aimed to investigate and compare the effects of survival processing and jealousy processing on recall memory. Additionally, the current study investigated potential sex differences in memory for sexual and emotional jealousy contexts. Adopting the survival processing paradigm, we used 4 scenarios in total. In addition to the original survival and pleasantness (control) conditions, we constructed two infidelity scenarios with respect to the adaptive variants of infidelity, namely sexual and emotional infidelity, using the well-established cues to infidelity (Shackelford & Buss, 1997) to provoke sexual and emotional jealousy. We believed that this would enable us to evoke a reproductive mindset as strong as the survival mindset. We expected to replicate the survival processing effect on memory. In general, we expected that infidelity scenarios would lead to, if not comparable to the survival, better memory performance than the pleasantness control. Following the findings from the evolutionary psychology literature (e.g., Schützwohl & Koch, 2004), we expected that men would recall more words processed in the sexual infidelity condition than the pleasantness condition. Conversely, it is expected that the emotional infidelity scenario would lead to better memory in women compared to the pleasantness condition. The experiment consisted of three phases; the rating task (study phase), the filler task, and the surprise recall test. In a 2 (Sex) x 4 (Processing Condition) design with repeated measures on the second factor, participants rated 10 words per condition (40 words in total) in the rating phase. The task in this part was to provide relevance ratings (or pleasantness for the control condition) for each word in the given processing condition. The order of the blocks in the rating task was counterbalanced while 10 words to be presented in each block with respect to the processing condition were randomly selected for each participant. Following the rating, task participants performed a 3-minute filler task in which simple arithmetical questions were addressed. Next, in the surprise recall test, participants were asked to write down all the words that they could remember from the first phase of the experiment. This final part lasted for 10 minutes, and participants were instructed to use all the time to recall as many words as possible. In the end, participants were addressed a forced-choice question asking which one of the infidelity scenarios they found more upsetting. The results of the current study showed support for the survival processing effect with words processed in the survival condition were recalled better compared to all other conditions. This finding was regardless of the block order. Contrary to our expectations, we found no evidence in favor of the jealousy processing with infidelity scenarios leading to a memory performance comparable to the pleasantness control, significantly lower than the survival condition. In addition, words processed in the survival and pleasantness conditions were given higher ratings than those rated for their relevance to sexual and emotional infidelity. Moreover, word rating response times were significantly longer in the survival condition compared to others. However, this was found to stem from the participants who received the survival condition as the first block in the rating task, suggesting that this difference in response times unlikely contributed to the survival advantage. Despite our effort to establish a match between the survival scenario and the infidelity scenarios we failed to find evidence supporting a jealousy processing effect on memory. As a consequence, we argue that there is no unique mnemonic benefit of jealousy processing. References: Nairne, J. S., Thompson, S. R., & Pandeirada, J. N. S. (2007). Adaptive memory: Survival processing enhances retention. Journal of Experimental Psychology: Learning Memory and Cognition, 33(2), 263–273. https://doi.org/10.1037/0278-7393.33.2.263 Schützwohl, A., & Koch, S. (2004). Sex differences in jealousy: The recall of cues to sexual and emotional infidelity in personally more and less threatening context conditions. Evolution and Human Behavior, 25(4), 249–257. https://doi.org/10.1016/j.evolhumbehav.2004.03.006 Shackelford, T. K., & Buss, D. M. (1997). Cues to infidelity. Personality and Social Psychology Bulletin, 23(10), 1034–1045. https://doi.org/10.1177/01461672972310004
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