Binary Image Processing
Sergey Ablameyko · SPIE eBooks · 1997
Cited by 5
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About 6,337 papers for “binary image processing”
Sergey Ablameyko · SPIE eBooks · 1997
Cited by 5
Alan C. Bovik · Elsevier eBooks · 2009
Cited by 25
Riyanto, Indra · 2011
Cited by 0Open access
Jean‐Charles Pinoli · 2014
Cited by 1
K. S. Huang, B. K. Jenkins, A. A. Sawchuk · Annual Meeting Optical Society of America · 1988
Digital optical computing is well suited to image processing tasks because of its parallelism and massive computational capability. Binary image algebra (BIA) provides a systematic parallel mathematical structure for developing parallel optical numerical array computation and image processing algorithms. A BIA representation and comparison of different kinds of parallel optical binary arithmetic (including symbolic substitution arithmetic) are discussed in Ref. 1 . Here we extend this study to image processing applications.
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Hongchi Shi · Journal of Mathematical Imaging and Vision · 1997
Cited by 6
Hongchi Shi, Hongchi Shi · 2007
This paper presents two new image algebra image-template operations match and mismatch derived from the general image-template product. These image algebra operations extend the binary morphological erosion and dilation operations and can be used to express elegantly most of binary image processing algorithms in a more natural way than binary morphological operations from the image processing viewpoint. In addition, the match and mismatch operations are easy to implement efficiently on SIMD bit-serial parallel computers. Keywords image algebra, mathematical morphology, binary image processing 1 . Introduction Binary image processing involves manipulating binary images consisting of only 1-pixels and 0-pixels. Binary image processing techniques are employed by binary machine vision systems in the detection and recognition of objects or object defects [3]. Binary morphology is an algebraic system concerning with analysis of shapes. It plays an important role in machine vision, since sh...
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Bulletin of Miscellaneous Information (Royal Gardens Kew)
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Bin Zhang, Kuizhi Mei, Nanning Zheng · IEEE Transactions on Circuits and Systems for Video Technology · 2012
Binary image processing is a powerful tool in many image and video applications. A reconfigurable processor is presented for binary image processing in this paper. The processor's architecture is a combination of a reconfigurable binary processing module, input and output image control units, and peripheral circuits. The reconfigurable binary processing module, which consists of mixed-grained reconfigurable binary compute units and output control logic, performs binary image processing operations, especially mathematical morphology operations, and implements related algorithms more than 200 f/s for a 1024 × 1024 image. The periphery circuits control the whole image processing and dynamic reconfiguration process. The processor is implemented on an EP2S180 field-programmable gate array. Synthesis results show that the presented processor can deliver 60.72 GOPS and 23.72 GOPS/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at a 220-MHz system clock in the SMIC 0.18-μm CMOS process. The simulation and experimental results demonstrate that the processor is suitable for real-time binary image processing applications.
Cited by 36
Canaan S. Hong, Richard Hornsey · 2008
In this paper, we demonstrate a CMOS active pixel sensor chip, integrated with binary image processing on a single monolithic chip. A prototype chip comprising a 64x64 photodiode array with on-chip binary image processing is fabricated in standard 0.35 µm CMOS technology, with 3.3V power supply. The binary image processing functionality is embedded in the column structure, where each processing element is placed per column, reducing processing time and power consumption. This column processing structure is scalable to higher resolution. A 3x3 local mask (also called structure element) is implemented every column so that row-parallel processing can be achieved with a conventional progressive scanning method. Keywords: Binary image processing, CMOS image sensor, On-chip processing, Low-level image processing, Column based processing 1.
Cited by 0
Carlo S. Regazzoni, A.S. Venetsanopoulos, G.L. Foresti et al. · 2002
A new class of statistical morphological operators for binary image processing is introduced. These operators are based on a digitized version of the mean field approximation. The main advantage of the new operators is provided by the capability of taking into account both noise and shape information. Binary statistical dilation (BSD) and binary statistical erosion (BSE) are considered as a case study. Extensivity properties of BSD and BSE are also discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
Cited by 12
Marchand-Maillet, Stephane 74814 aut, Sharaiha, Yazid M., 1966- 74816 aut
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Regazzoni C, Venetsanopoulos A, Vernazza G. et al. · Institutional Research Information System (University of Udine) · 1994
Cited by 0
Daniel Oliveira Dantas, Helton Danilo Passos Leal · 2019
Binary images are often used in image processing pipelines, and are usually stored in the unpacked format, i.e., 8 bits per pixel. The packed format uses 1 bit per pixel, 8 times less memory, and is a good option when dealing with images too big to fit in RAM. This paper presents a parallel implementation of pixelwise and window operators for packed binary images. The implementation, written in OpenCL, can run in GPUs or multiple core CPUs. The proposed Destination Word Accumulation (DWA) implementation of morphological operations is faster than Leptonica in 2D and up to two orders of magnitude faster than Python and MATLAB in 1D to 5D.
Cited by 0
M.R. Smith · 2005
Image processing techniques (and papers describing them) have evolved rapidly in recent years. Lately, publications in image processing have underscored advances in compression, restoration, and enhancement of gray level and color coded image information using dedicated pipeline processing and systolic array architectures. These new algorithms and specialized hardware have been developed and applied to such real-time tasks as automated testors on manufacturing lines and robotic vehicle guidance systems. Often overlooked is the part of binary image processing. A review of binary processing techniques is valuable in understanding the the basic operating principles of high-speed optical inspection devices in particular and many pipeline array processing devices in general. The class of binary image transforms covered here was originally developed for topological operations on threshold image data. These non-linear operations are based on boolean transformations of a pixel and its eight adjacent neighbors (in a discrete Cartesian plane) and are named morphological transforms by authors. A straightforward way to visualize such transforms is outlined in the paper and will be demonstrated at the conference. The demonstration program package was written using the IBM Personal Computer BASI language and was presented as an educational tool in a graduate level course in image processing. The skeletal program included in the text was enhanced to allow real-time demonstration of these transform techniques and encourages readers to experiment and develop their own lookup tables and image transforms. Understanding the function and generation of these lookup tables, which can provide any arbitrary boolean combination of the nine binary values available from a pixel and its eight Cartesian neighbors, is the key to grasping the image-transforms illustrated here. Examples in the paper and presentation give the reader an idea of the power and flexibility these transforms provide in image processing and feature recognition tasks. An overview of some relevant image processing topics precedes the discussion of binary transforms and the transform simulator.
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Luc Robert, Luc Robert, Thème Interaction Homme-machine et al. · 2015
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L Arun · 2014
Binary image processing is a powerful tool in many image and video applications. Discrete cosine transformation is used in this work, as information capability is superior to other transformations. The choice of coding is situation dependant .In general a single coding is employed that may be variable length coding or run length coding. This gives a satisfactory compression ratio up to 50% but still is not very good. The present work employs the combination of both the coding techniques i.e. image is first coded as run length of levels and then run lengths are again coded using variable codes. The outcome of this work is a software system for gray scale image compression which is based on lossy compression. In this paper, we can add image compression using run-length encoding concept . So only we consider the feasible for the operations what we are doing. This technique has the advantage of providing better compression ratio i.e. 10 to 95 times over the other existing techniques which compress images up to 50 times. Further this technique is very flexible as it gives user the choice for selecting compression ratio and retrieved image quality
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Ablameyko, Sergey V., Bogush, R., Maltsev, S. et al. · Digital Library of the Belarusian State University (Belarusian State University) · 2001
A novel algorithm for time reduction in binary image processing, namely for computation of correlation between image and object template is proposed. This algorithm is based on direct computation of vector-matrix multiplication with utilisation of binary matrix factorisation approach. Comparison with other algorithms is given and it is shown that our approach allows to reduce time and complexity of this task
Cited by 0Open access
Jean-Didier Legat, P. De Muelenaere · 2002
A new ASIC coprocessor has been designed binary image processing applications. This dedicated IC has been fabricated in a 1.5 micron CMOS technology and contains 50000 gates. An important feature is that the chip is developed to be fully compatible with the Motorola MC680x0 family of processors. It works in coprocessor or peripheral mode on a 8-, 16- or a 32-bit bus.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Steven Pigeon, Yoshua Bengio · 1999
This paper shows the existence of binary pseudowavelets, bases on the binary domain that exhibit some of the properties of wavelets, such as multiresolution reconstruction and compact support. The binary pseudowavelets are defined on B/sup n/ (binary vectors of length n) and are operated upon with the binary operators logical and, and exclusive or. The forward transform, or analysis, is the decomposition of a binary vector into its constituent binary pseudowavelets. Binary pseudowavelets allow multiresolution, progressive reconstruction of binary vectors by using progressively more coefficients in the inverse transform. Binary pseudowavelets bases, being sparse matrices, also provide for fast transforms; moreover pseudowavelets rely on hardware-friendly operations for efficient software and hardware implementation.
Cited by 2