BIT SYNCHRONIZATION
McRae, D. D., Smith, E. F. · UA Campus Repository (The University of Arizona) · 1972
International Telemetering Conference Proceedings / October 10-12, 1972 / International Hotel, Los Angeles, California
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About 2,882 papers for “bit synchronization”
McRae, D. D., Smith, E. F. · UA Campus Repository (The University of Arizona) · 1972
International Telemetering Conference Proceedings / October 10-12, 1972 / International Hotel, Los Angeles, California
Cited by 0
Martin H. Weik · 2000
Cited by 0
P. A. Wintz · NASA Technical Reports Server (NASA) · 1967
Cited by 2
Yaw-Shing Tang, Ki-Seok Moon, Hyung Jai Lee · IEEE Transactions on Magnetics · 2009
Writing bit-patterned media has been a challenging problem because it is necessary to synchronize write timing with physical bit-pattern locations on disk. This timing requirement must be addressed not only in disk drives but also in testing environments such as a spin stand. This paper first describes a technique for synchronizing write timing on a spin stand. Testing results show that, with data block length similar to a disk drive sector, the write timing jitter due to synchronization error is much smaller than the magnetic transition jitter. We then discuss the potential timing jitter sources in a disk drive, including disk speed variation, head vibration, and write clock stability. Experimental data show that the head vibration is potentially the most difficult jitter source for the write clock to handle. The possibility and difficulty in applying coding techniques to correct write timing error is also investigated. While it is possible to create codes for this purpose, practical considerations can limit its usefulness.
Cited by 23
Randy Houk, Kim Windingland · 1989
Cited by 1
Woolsey, Warren O., Novak, John I., Wigner, William K. et al. · Defense Technical Information Center (DTIC) · 1968
This report describes the atomic clock and frequency averaging synchronization techniques, presents a comparison of these techniques, and offers conclusions on their applicability to the MALLARD system. Analytical results show that the expected magnitude and rate of reference frequency variations will not significantly affect the operation of the frequency averaging technique. The on-off and both-end control methods of implementing the frequency averaging techniques are discussed. There does not appear to be any advantage to the on-off method over the chosen continuous method. In both-end control, the system frequency is independent of link delays; however, its increased complexity would be difficult to justify for use at all nodes, since for nonsatellite repeater nodes the single end method will satisfy the MALLARD requirements. The comparative evaluation discussed both techniques relative to the TGIM design, network synchronization loss and recovery and network performance. The relative operational characteristics of the candidate techniques are compared with particular emphasis given to their reliability, required power, maintainability, cost, size, and weight. This evaluation has indicated that the frequency averaging technique is more reliable and less costly to maintain than the atomic clock technique, primarily due to the complexity of the atomic standard. Comparisons of cost, weight, size, and power also favor the frequency averaging technique. The frequency averaging technique is sensitive to network structure or at least to changes in structure and therefore, the atomic clock technique is superior in this respect. (Author)
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Louis R. Chow; 趙榮耀; Paul P. Wang; Harry A. Owen, Jr. · 1971
本書目待補正
Cited by 0
Carlos Pomalaza‐Ráez, Seshadri Mohan · 2002
All-digital bit synchronization systems are studied. Tree search algorithms, in particular the (M,L) algorithm, are proposed for improved estimate of the bit epoch. Numerical results show that this method has greater performance than more conventional bit synchronizers such as the data-transition tracking loop.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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P. Blixt, John E. Bowers · IEEE Photonics Technology Letters · 1995
We have demonstrated a new synchronization technique to align the inputs at a fiber-optical switching node. We compensate for the delay induced by the slowly varying ambient temperature at the links with a temperature tuned laser diode in combination with the dispersion of the fiber. This scheme shows excellent linearity and negligible transmission penalty in timing jitter and pulse shape variations. The maximum bit-shift obtained experimentally was 850 ps for a fiber dispersion of 200 ps/nm, implying that bit synchronization can be obtained at bit-rates exceeding 1 Gb/s.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
Cited by 9
Dengyun Lei, Weijun Lu, Yanbin Zhang et al. · IEICE Transactions on Communications · 2015
Due to low signal-to-carrier ratio and high dynamic, the frequency deviation affects the bit synchronization in GNSS receiver. This paper proposes a balance differential coherent bit synchronization algorithm, which uses the differential coherent method to eliminate the influence of the frequency deviation. By enlarging the differential distance, the proposed algorithm achieves higher bit synchronization rates. Combining two complementary differential coherent parts, the proposed algorithm avoids the unbalance problem and the attenuation of accumulation. Furthermore, a general architecture is presented to reduce the system complexity. Experimental results show that the proposed algorithm improves the sensitivity of bit synchronization by 3∼7dB compared with the previous method.
Cited by 1
L. E. Franks, Fellow Ieee · 1980
Absrmcr-This paper examines the problems of carrier phase estimation and symbol timing estimation for carrier-type synchronous digital data signals, with tutorial objectives foremost. Carrier phase recovery for suppressed-carrier versions of double sideband (DSB), vestigial sideband (VSB), and quadrature amplitude modulation (QAM) signal formats is considered first. Then the problem of symbol timing recovery for a baseband pulse-amplitude modulation (PAM) signal is examined. Timing recovery circuits based on elementary statistical properties are discussed as well as timing recovery based on maximum-likelihood estimation theory. A relatively simple approach to evaluation of timing recovery circuit performance in terms of rms jitter of the timing parameters is presented. I I.
Cited by 0
W. C. Lindsey · 1973
Abstract : The report presents the results obtained during the study on mathematical modeling of PCM bit synchronizers (also known as PCM signal conditioners). It is written in two parts. The first part presents results obtained on the study of the effects which bit synchronization has on the bit error rate (BER). The second part of the report is devoted to the study of bit synchronization performance characterization. A general discussion is given which highlights the many performance measures which serve to characterize the performance of BSS. Some general mathematical relations are given for evaluation of the acquisition time, acquisition range, and bit slippage rate for PCM bit synchronizers which are mechanized such that the phase detector characteristic is periodic.
Cited by 0
Jiahao Wang, Rongke Liu, Kairui Tian et al. · 2025
In this paper, we propose an auxiliary bit-aided polar-coding-assisted blind frame synchronization (AA-PBFS) method. Specifically, certain frozen bits of the polar codes are replaced with auxiliary bits. During the synchronization process, the decoding result of auxiliary bits are checked, and candidate positions that do not match are early terminated, which reduces the computational complexity. We analyze the effect of auxiliary bits selection on early termination performance and provide strategies for auxiliary bits selection. Simulation results indicate that AA-PBFS reduces computational complexity by 57.9% compared to the existing polar coding-assisted blind frame synchronization method, while the synchronization performance is almost the same.
Cited by 0Open access
趙榮耀; Chow, Louis R.; Owen, Harry A. · 1973
補正完畢
Cited by 0
Jung‐Hui Chiu, Lin-shan Lee · IEEE Transactions on Communications · 1987
A new bit synchronization concept based on the "minimum likelihood" criterion instead of the conventional "maximum likelihood" concept is developed. The minimum likelihood situation is even easier to reach than the maximum likelihood because the derivative of the log likelihood function becomes identically zero there. Minimum likelihood implies "least likely" for synchronization (the worst case synchronization error) or an "orthogonal" timing condition which simply means that the locally generated clock is synchronized correctly, but with a delay of a half bit period. The structure and performance of the minimum likelihood bit synchronizer are discussed in detail in this paper. The results indicate that the minimum likelihood bit synchronizer has a much simpler structure, but with performance very close to the optimal maximum likelihood synchronizer.
Cited by 14
Mengdan Cao, Yu Chen, Yukui Zhou et al. · Lecture notes in electrical engineering · 2023
Cited by 0
James Palmer · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1999
The direction of this paper is to describe the analytical tools and measurement techniques used at SilkRoad to evaluate the optical and electrical signals used in Optical Refractive Synchronization for transporting SONET signals across the transmission fiber. Fundamentally, the direction of this paper is to provide an outline of how SilkRoad, Inc., transports a multiplicity of SONET signals across a distance of fiber > 100 Km without amplification or regeneration of the optical signal, i.e., one laser over one fiber. Test and measurement data are presented to reflect how the SilkRoad technique of Optical Refractive Synchronization is employed to provide a zero bit error rate for transmission of multiple OC-12 and OC-48 SONET signals that are sent over a fiber optical cable which is > 100Km. The recovery and transformation modules are described for the modification and transportation of these SONET signals.
Cited by 0
Carl Lindquist · Chalmers Publication Library (Chalmers University of Technology) · 2019
Cited by 0Open access
Xinning Liu, Yuxiang Niu, Jun Yang et al. · IEICE Transactions on Communications · 2015
TTFF (Time-To-First-Fix) is an important indicator of GPS receiver performance, and must be reduced as much as possible. Bit synchronization is the pre-condition of positioning, which affects TTFF. The frequency error leads to power loss, which makes it difficult to find the bit edge. The conventional bit synchronization methods only work well when there is no or very small frequency error. The bit synchronization process is generally carried out after the pull-in stage, where the carrier loop is already stable. In this paper, a new bit synchronization method based on frequency compensation is proposed. Through compensating the frequency error, the new method reduces the signal power loss caused by the accumulation of coherent integration. The performances of the new method in different frequency error scenarios are compared. The parameters in the proposed method are analyzed and optimized to reduce the computational complexity. Simulation results show that the new method has good performance when the frequency error is less than 25Hz. Test results show that the new method can tolerate dynamic frequency errors, and it is possible to move the bit synchronization to the pull-in process to reduce the TTFF.
Cited by 1
Chit-Sang Tsang, W. C. Lindsey · IRE Transactions on Communications Systems · 1986
Bit synchronization in the presence of asymmetric channel noise has not appeared in the open literature. It is the purpose of this paper to study the tracking performance (clock jitter and cycle slip rate) of a popular digital clock synchronizer, the digital data transition tracking loop (DTTL), in the presence of asymmetric noise. Related parameters of interest, the transition density and data asymmetry, are also included. Acquisition performance (frequency acquisition time) is discussed in the absence of noise. A comparison of the DTTL and crossspectrum synchronization loop (CSSL) is also provided. Numerical results are Presented for the design of a bit synchronizer in this environment.
Cited by 12