André Brinkmann, Sascha Effert · 2007
Storage clusters try to transfer the idea of cluster computing into the storage domain and to scale capacity and performance by simply adding new cluster components. This paper presents analytical considerations on the scalability of storage clusters and presents a storage cluster architecture based on peer-to-peer computing that is able to scale up to hundreds of servers and clients. The resulting storage cluster environment has been successfully implemented and tested on a Linux based HPC-cluster. The measurement results presented in this paper demonstrate the feasibility and scalability of this architecture.
Cited by 1
Fantechi A., Gnesi S., Lijtmaer N. · ISTI Open Portal · 1985
This work has been developed on the basis of a previous work made inside a project for a functionally distributede system (Cnet), in which an intern-node communication mechanism was defined in terms of Ada packages. This paper gives a more general framework of properties for desired communication schemes. Some design issues such as the use of formal verification techniques and the integration of the communication mechanism in a high level language are then discussed.
Cited by 0Open access
Saurav Gupta, Ajit Kumar Sahoo, Upendra Kumar Sahoo · 2017
We deal with distributed networks, estimating the parameters using diffusion strategies. In the combination stage of diffusion strategy, each node combines their intermediate estimates with the closed neighborhood nodes. This requires a large amount of communication between nodes to transmit and receive intermediate estimated vector. In this article, an efficient algorithm to reduce communication overhead between nodes is proposed in which each sensor node transmits only a subset of entries of the intermediate estimated vector. The deduced algorithm has been managed to reduce communication overhead at the same time retaining the benefits of cooperation. The simulation results convey the reduction of communication between the nodes via a suitable compromise between performance and communication costs of the estimation.
Cited by 4
Kazuya ONO, Ren MORITA, Katsuya Matsubara et al. · The Proceedings of JSME annual Conference on Robotics and Mechatronics (Robomec) · 2022
In the ROS, which is middleware for developing robot control systems, the programs that realize the robot functions are treated as nodes. In ROS 2, the latest version of ROS, communication between nodes is realized by DDS, and several vendors provide DDS implementations with different characteristics. However, in the current ROS 2, only one DDS implementation can be selected per system. Therefore, it is difficult for all nodes to communicate with each other using the optimal DDS implementation due to characteristics such as data size and communication range. In this research, we propose a mechanism called“DDS Binder”that switches the appropriate DDS implementation for each communication path between nodes. We realized the switching of DDS implementations under the constraint that only one DDS implementation can be used simultaneously in one node, and the latency measurement results showed that the inter-node communication was optimized.
Cited by 0
Takuya Fukuoka, Wataru Endo, Kenjiro Taura · 2019
In the era of multi-/many-core processors, there are increasing needs for middleware of high-performance computing to exploit both inter-node and intra-node parallelism. To overlap communication and computation efficiently, many studies have focused on MPI+ULT, a combination of MPI for inter-node parallelism and user-level threads (ULTs) for intra-node parallelism. However, there are mainly two problems in the existing MPI+ULT implementations. First, the use of MPI_THREAD_MULTIPLE to invoke MPI functions from multiple threads causes a performance bottleneck. Second, some MPI+ULT systems focus on the use of non-blocking communication and programmers have to manage both the start and the end of communication explicitly. To solve these problems, we introduce a high-performance MPI+ULT implementation MPI+myth. MPI+myth focuses on implicit overlapping of communication and computation without any code modifications to the applications. Furthermore, it can avoid the overhead of multi-threaded MPI invocations using a communication dedicated thread and adopts a new scheduling technique which achieves efficient load balancing by avoiding a situation that a core is occupied by blocking ULTs. In the evaluation, we demonstrate significant performance improvement compared with the existing hybrid programming methods using several microbenchmarks and one mini application miniFE. In addition, we illustrate that MPI+myth has the potential to overlap communication and computation and our new ULT scheduling technique can achieve load balancing more efficiently than existing ULT scheduling techniques.
Cited by 3
Vincent Winstead, Chengtao Xu · 2018
Low Energy Bluetooth (LowE-BT) communication is becoming more ubiquitous as the number of wireless connectable devices increase. It is also emerging as a communication methodology supporting low energy wireless communication in renewable distributed energy systems. A typical LowE-BT configuration incorporates one fixed configuration client (master) device and one or more fixed configuration server (slave) device(s). For multiple devices in an Ad-hoc network having inter-communication needs where the physical separation cannot accommodate a centralized scheme, a robust and reconfigurable communication topology is desired. In particular, we consider a case where the physical devices are equally spaced along a line (or string) with sufficient distance to necessitate node-to-node communication only. We propose and compare two schemes. The first is an asynchronous scheme in which randomized client/server reconfiguration occurs within a prescribed interval allowing simultaneous message packet transfers along the entire network to occur. The second is a synchronous scheme in which the client/server reconfiguration and packet transfers occur sequentially along the network. Given the data packets from all nodes can be combined to form a block packet transferred from one end of the string to the other, the mean time for network block packet transfers are computed and compared for these two schemes to determine which method minimizes block packet transmission time.
Cited by 0
Xu, Chengtao · Cornerstone (Minnesota State University, Mankato) · 2018
Low Energy Bluetooth (LowE-BT) communication is becoming more ubiquitous as the number of wireless connectable devices increase. It is also emerging as a communication methodology supporting low energy wireless communication in renewable distributed energy systems. A typical LowE-BT configuration incorporates one fixed configuration client (master) device and one or more fixed configuration server (slave) device(s). For multiple devices in an Ad-hoc network having inter-communication needs where the physical separation cannot accommodate a centralized scheme, a robust and reconfigurable communication topology is desired. In particular, we consider a case where the physical devices are equally spaced along a line (or string) with sufficient distance to necessitate node-to-node communication only. We propose and compare two schemes. The first is an asynchronous scheme in which randomized client/server reconfiguration occurs within a prescribed interval allowing simultaneous message packet transfers along the entire network to occur. The second is a synchronous scheme in which the client/server reconfiguration and packet transfers occur sequentially along the network. Given the data packets from all nodes can be combined to form a block packet transferred from one end of the string to the other, the mean time for network block packet transfers are computed and compared for these two schemes to determine which method minimizes block packet transmission time.
Cited by 0Open access
Shigero Sasaki, Atsuhiro Tanaka · 2008
Our goal is to predict the performance of multi-node systems consisting of identical processing nodes based on single node profiles. We clarified how much inter-node communication is caused on n-node systems because the performance significantly depends on the communication amount. However, the amount when business applications such as databases are running is difficult to predict for the following reasons: First, applications are closed and/or complex. Second, workloads vary from system to system. Third, the number of nodes affects the amount. We analytically model the amount under a simple cache coherence mechanism. Our model predicted, with a high degree of accuracy, the number of transfers of cached copies obtained by simulation. Even though our model explains the transfers only under a simple mechanism, the model should explain a fundamental part of those under more complex ones.
Cited by 2
Weiliang Tan, Peizhen Lin, Bo Liang et al. · 2009
As technologies such as symmetrical multiprocessing (SMP) and multicore processor (MCP) advanced, more and more computational cores are contained in one node. Therefore, parallel applications running on a cluster can exchange data among processes through either intra-node or inter-node communication. This gives rise to the question of how much network bandwidth impact on parallel computing performance when intra-node and inter-node communications exist in a certain proportion. In this paper, we try to analyze and estimate this impact via using communication mechanism of message passing interface (MPI) and multi-core technology. The results show that the proportion of intra-node communication to inter-node communication has a significant effect on performance when the network bandwidth is between 50~400Mib/s, especially about 200Mib/s.
Cited by 1
Fantechi A., Gnesi S. · ISTI Open Portal · 1988
Cited by 0
Min Yeol Lim, Vincent W. Freeh, David K. Lowenthal · Parallel Computing · 2011
Cited by 19
Chris Feilbach, Adam S. Sperling, Eftychios Sifakis et al. · Minds at UW (University of Wisconsin) · 2016
Scientific computing workloads are well suited to parallel accelerators such as GPGPUs and the Intel Xeon Phi. While these accelerators can provide greater performance than traditional CPUs due to their parallel architectures and greater memory bandwidth, their maximum workload size is limited by relatively small memory capacity. To solve this problem, data can be split across multiple accelerators to utilize the combined memory capacity as well as increased compute capability. Combining multiple accelerators into heterogeneous systems introduces a new bottleneck. Communication bandwidth between accelerators over the PCIe interconnect is much slower than internal memory bandwidth. This project examines the inter-node bandwidth bottleneck using the Intel Xeon Phi in the context of scientific applications. We show the limitations of traditional MPI programming paradigms, and leverage Intel?s Xeon Phi-specific SCIF communication API to achieve increased inter-node memory bandwidth. While small messages still incur communication overhead penalties, messages larger than 512KB are able to saturate the PCIe bus and achieve bandwidth utilization close to 90% of the theoretical maximum. This project also attempts to address the complexities of programming systems of multiple accelerators. We introduce a software interface wrapper over SCIF that coalesces groups of small messages into larger ones. This new interface eases the programming experience and provides greater interconnect bandwidth from coalescing.
Cited by 0Open access
Jaidev K. Sridhar · OhioLink ETD Center (Ohio Library and Information Network) · 2009
Moores Law – frequency scaling and exploitation of Instruction Level Parallelism due to increasing transistor density no longer leads performance gains in modern systems due to limitations in power dissipation. This has led to an increased focus on deriving performance gains by taking advantage of Data Level Parallelism through parallel computing. Clusters – groups of commodity compute nodes connected via a modern interconnect have emerged as the top supercomputers in the World and the Message Passing Interface (MPI) has emerged as the de facto standard in parallel processing models on large clusters. Scientific and financial applications have ever increasing demands for compute cycles and the emergence of multi-core processors has driven an enormous growth in the cluster sizes in recent years. InfiniBand has emerged as a popular low-latency, high-bandwidth interconnect of choice in these large clusters. With cluster sizes continuing to scale, the scalability of MPI libraries and associated system support and resources such as the job launcher have been at the center of attention in the High Performance Computing (HPC) community. In this work we examine the current job launching mechanisms that have scalability problems on large scale clusters due to resource constraints as well as performance bottlenecks. We propose a Scalable and Extensible Launching Architecture for Clusters (ScELA) that scales to modern clusters such as the 64K processor TACC Ranger. ii We also examine the scalability constraints with point-to-point InfiniBand channels in MPI libraries. We use the eXtended Reliable Connection (XRC) transport available in recent InfiniBand adapters to design a scalable MPI communication channel with a smaller memory footprint. The designs proposed in this work are available in both MVAPICH and MVAPICH2 MPI libraries over InfiniBand, which are used by more than nine hundred organizations around the World.
Cited by 0Open access
Sri Raj Paul, Akihiro Hayashi, Matthew Whitlock et al. · OSTI OAI (U.S. Department of Energy Office of Scientific and Technical Information) · 2020
Abstract not provided.
Cited by 0Open access
Sanchita Paul · OSTI OAI (U.S. Department of Energy Office of Scientific and Technical Information) · 2021
Abstract not provided.
Cited by 0Open access
Srimanth Gadde · OhioLink ETD Center (Ohio Library and Information Network) · 2013
Palepu who are always there with me in good and difficult situations
Cited by 3Open access
Benjamin S. Parsons, Vijay S. Pai · 2014
This paper presents and evaluates a universal algorithm to improve the performance of MPI collective communication operations on hierarchical clusters with many-core nodes. This algorithm exploits shared-memory buffers for efficient intra-node communication while still allowing the use of unmodified, hierarchy-unaware traditional collectives for inter-node communication (including collectives like Alltoallv). This algorithm improves on past works that convert a specific collective algorithm into a hierarchical version and are generally restricted to fan-in, fan-out, and All gather algorithms. Experimental results show impressive performance improvements utilizing a variety of collectives from MPICH as well as the closed-source Cray MPT for the inter-node communication. The experimental evaluation tests the new algorithms with as many as 65536 cores and sees speedups over the baseline averaging 14.2x for Alltoallv, 26x for All gather, and 32.7x for Reduce-Scatter. The paper further improves inter-node communication by utilizing multiple senders from the same shared memory buffer, achieving additional speedups averaging 2.5x. The discussion also evaluates special-purpose extensions to improve intra-node communication by returning shared memory or copy-on-write protected buffers from the collective.
Cited by 5
Mirosław Hajder, Piotr Hajder, Mateusz Liput et al. · Lecture notes in computer science · 2021
Cited by 0
G. Sita, K. G. Srinivasa, P. Srinivasa · International Journal of Computer Applications · 2015
In modeling the network traffic Poisson process is extensively used for packet and connection arrivals. Bit in internet traffic an arrival process is bursty due to selfsimilarity and time dependent nature. Rakesh Singhai et al( In this paper for the first time we design a two node communication network with Weibull inter arrival times having Dynamic Band Width Allocation. Here, it is assumed that two transmitters are connected in tandem and packets arrive at the source are stored in buffers for forward transmission. The transmission strategy is dynamic band width allocation. The network performance measures such as average number of packets in each buffer, the mean delays in transmission, the throughput, the utilization of transmitters are derived explicitly. It is observed that the time dependent nature of mean arrival rate has significant influence on the performance measures. The dynamic band width allocation can reduce the congestion in buffers and mean delays in transmission. This model also include two node communication network model and exponential inter arrival times as a particular case.
Cited by 2Open access
Vida Sobhani, Jan Lorenz, Tobias Gemmeke · 2024
High-performance simulation platforms are integral to advancing research in computational neuroscience. Recently, the development of multi-FPGA platforms for such simulations has gained prominence due to the inherent flexibility of FPGAs, allowing them to adapt to the evolving demands of computational neuroscience. These platforms have reached sub-realtime simulation capabilities for medium-sized models with realistic biological considerations. Despite leveraging communication architectures with minimized network diameter and traveling distance, further acceleration is constrained by the communication architecture, specifically the communication latency. This study addresses the latency bottleneck associated with inter-FPGA communication in computational neuroscience simulators. The serial interface and the accompanying communication protocol significantly contribute to this latency. The existing solutions optimize the protocol without considering their design impact on the interface latency, which must be considered when transferring a vast number of small packets - the typical traffic load in computational neuroscience simulators. To tackle this, we introduce a customized ultra-low latency serial link utilizing FPGA-embedded multi-gigabit transceivers. This design offers the flexibility to adapt to various application demands while minimizing latency by co-optimizing the physical and link layers. Experimental results on the Xilinx U200 platform demonstrate that a 128-bit packet can be transmitted from a router to a neighboring router over a 15.625 Gbps link in 34 ns. Our analyses show that employing the proposed customized link can lead to a 72-fold speedup in the neuroAIx platform when simulating the microcircuit model.
Cited by 1