Hoffman, Kevin John · Purdue e-Pubs (Purdue University System) · 2013
The need for programs to execute subcomponents in isolation from each other or with lower privileges is prevalent among today's systems. While modern operating systems provide mechanisms for fine-grained isolation of OS resources, only course-grained mechanisms exist for efficient isolation of heap memory. This dissertation develops a new memory programming model known as ribbons to enable fine-grained isolation of heap memory. Ribbons is a shared memory programming model that allows for more implicit sharing of memory than multiprocessing yet is more restrictive than multithreading. The ribbons model hierarchically structures the heap into protection domains. Privileges between these protection domains are carefully controlled in order to "sandbox" computation as needed. To allow practical use of the model in new and existing programs, this dissertation defines a backwards-compatible extension of Java, termed RibbonJ. The progress and isolation properties of RibbonJ are analyzed within a simplified formal model. Additionally, ribbons is implemented within JikesRVM, leveraging existing hardware memory protection mechanisms to avoid the overhead of inline security checks and read or write barriers. Runtime efficiency is evaluated through microbenchmarks and the DaCapo benchmarks, exhibiting minor overhead. This dissertation also studies ribbons further by refactoring Apache Tomcat and Apache httpd. Apache Tomcat is refactored to use RibbonJ for application isolation, the resulting design and complexity are detailed, and performance is evaluated using the SPECweb2009 benchmark. Finally, Apache httpd is enhanced with a ribbonized multiprocessing module, and performance is analyzed via the Apache HTTP benchmarking tool, ab.
Cited by 2Open access
James R. Larus, Satish Chandra, David A. Wood · Minds at UW (University of Wisconsin) · 1994
A programming performance model provides a programmer with feedback on the cost of program operations and is a necessary basis to write efficient programs. Many sharedmemory performance models do not accurately capture the cost of interprocessor communication caused by non-local memory references, particularly in computers with caches. This paper describes a simple and practical programming performance model--called check-in, check-out (CICO)--for cache-coherent, shared-memory parallel computers. cica consists of two components. The first is a collection of annotations that a programmer adds to a program to elucidate the communication arising from shared-memory references. The second is a model that calculates the communication cost of these annotations. An annotation's cost models the cost of the memory references that it summarizes and serves as a metric to compare alternative implementations. Several examples demonstrate that cica accurately predicts cache misses and identifies changes that improve program performance.
Cited by 18Open access
C.C. Lee, H.A. Fatmi · 1990
Cited by 0
Amittai Aviram, Bryan Ford, Yu Zhang · 2013
Recent interest in deterministic parallelism has yielded new deterministic programming languages, which offer promising features but require rewriting existing code, and deterministic schedulers, which emulate existing thread APIs but do not eliminate races from the basic programming model. Workspace consistency (WC) is a new synchronization and memory consistency model that offers a “naturally deterministic, ” race-free programming model that can be adopted in both new or existing languages. WC’s basic semantics are inspired by—and intended to be as easily understood as— the “parallel assignment ” construct in sequential languages such as Perl and JavaScript, where concurrent threads always read their inputs before writing shared outputs. Prototype implementations of a restricted form of WC already exist, supporting only strictly hierarchical fork/join-style synchronization, but this paper develops and explores the model in more detail and extends it to support non-hierarchical synchronization patterns such as producer/consumer pipelines and futures. 1
Cited by 0
Jaroslaw Nieplocha, R.J. Harrison, R.J. Littlefield · 2002
Portability, efficiency and ease of coding are all important considerations in choosing the programming model for a scalable parallel application. The message-passing programming model is widely used because of its portability, yet some applications are too complex to code in it while also trying to maintain a balanced computation load and avoid redundant computations. The shared-memory programming model simplifies coding, but it is not portable and often provides little control over interprocessor data transfer costs. This paper describes a new approach, called Global Arrays (GA) that combines the better features of both other models, leading to both simple coding and efficient execution. The key concept of GA is that it provides a portable interface through which each process in a MIMD parallel program can asynchronously access logical blocks of physically distributed matrices, with no need for explicit cooperation by other processes. We have implemented GA libraries on a variety of computer systems, including the Intel DELTA and Paragon, the IBM SP-1 (all message-passers), the Kendall Square KSR-2 (a nonuniform access shared-memory machine), and networks of Unix workstations. We discuss the design and implementation of these libraries, report their performance, illustrate the use of GA in the context of computational chemistry applications, and describe the use of a GA performance visualization tool.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
Cited by 49
Filip Strömbäck · Linköping studies in science and technology. Dissertations · 2023
The performance of computational devices is steadily increasing. Recently, the main contributor to the increasing performance has been an increasing number of cores rather than increased performance for individual cores. This trend is not only visible in high-end de-vices, such as powerful workstations, but also in low-end devices such as smartphones and many embedded devices. Due to this trend, and to the ubiquity of multicore systems, it is increasingly important for computer science students to have at least some familiarity with working with concurrent programs, as they are likely to encounter such programs in some shape or form in their future professional careers. In this thesis, we use the term concurrent programming to emphasize the focus on concurrency in a programming context, as opposed to concurrency in isolation. Prior work has shown that students struggle with learning concurrent programming. This is not surprising in and of itself, as concurrency is generally considered to be a difficult topic. To help students learn concurrent programming, it is important to consider why they find the topic difficult. As such, the first part of this thesis aims to gain better insights into these difficulties. This is done partly by studying prior work in the literature and partly by conducting new research. The results show that the struggles are not only due to the difficulty involved in understanding the new concepts related to concurrency. Rather, a large portion of students’ struggles can be attributed to the fact that the non-determinism in concurrent programs requires a more formal approach to programming. The transition from an informal approach, where students are able to rely on ad-hoc testing, to a more formal approach is difficult in and of itself, but it also highlights problems in students’ understanding of fundamental programming skills. For example, without a detailed enough understanding of scope, aliasing and references it is difficult to reason about what data is shared between threads. In light of these results, the remainder of this thesis describes ways of helping students learn concurrent programming. This is achieved by developing a program visualization tool, called Progvis, which is capable of visualizing the behavior of concurrent programs written in the C language. Progvis is unique in the sense that it focuses not only on concurrency, but also illustrates how concurrency interacts with the fundamental concepts that were found to be problematic. As such, it is able to give students a complete and accurate picture of the visualized program’s behavior. To further help students, Progvis also includes a model-checker that can automatically find concurrency issues, thereby helping students to easily see whether their reasoning about the program’s behavior was correct or not. The results suggest that the visualizations generated by Progvis have the potential to help students learn concurrent programming. A small pilot study showed that students who used Progvis were able to solve concurrency problems faster and arrived at better solutions compared to students who only used traditional tools. To evaluate long-term effects on learning, Progvis was also integrated into a course on concurrency and operating systems. Comparing the students’ performance on the final exam showed that the students who had used Progvis were more likely to correctly associate their synchronization with the associated data compared to students who had not used Progvis during the course. Even though no significant increase was observed in students’ overall performance, these results suggest that using Progvis does indeed have a positive impact on students’ learning.
Cited by 3Open access
Amittai Aviram, Bryan Ford · arXiv (Cornell University) · 2009
The difficulty of developing reliable parallel software is generating\ninterest in deterministic environments, where a given program and input can\nyield only one possible result. Languages or type systems can enforce\ndeterminism in new code, and runtime systems can impose synthetic schedules on\nlegacy parallel code. To parallelize existing serial code, however, we would\nlike a programming model that is naturally deterministic without language\nrestrictions or artificial scheduling. We propose "deterministic consistency",\na parallel programming model as easy to understand as the "parallel assignment"\nconstruct in sequential languages such as Perl and JavaScript, where concurrent\nthreads always read their inputs before writing shared outputs. DC supports\ncommon data- and task-parallel synchronization abstractions such as fork/join\nand barriers, as well as non-hierarchical structures such as producer/consumer\npipelines and futures. A preliminary prototype suggests that software-only\nimplementations of DC can run applications written for popular parallel\nenvironments such as OpenMP with low (<10%) overhead for some applications.\n
Cited by 0Open access
Jesús A. González, Coromoto León, C. Rodrı́guez et al. · Lecture notes in computer science · 2001
Cited by 1
Samar Yazdani, Joël Cambonie, Bernard Pottier · SPIRE - Sciences Po Institutional REpository · 2008
Cited by 0
Fresno, Javier, Barba, Daniel, Gonzalez-Escribano, Arturo et al. · LA Referencia (Red Federada de Repositorios Institucionales de Publicaciones Científicas) · 2018
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Rengan Xu, Xiaonan Tian, Sunita Chandrasekaran et al. · 2015
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Elizabeth D. Brooks, K H Warren · University of North Texas Digital Library (University of North Texas) · 1997
In this paper we examine the use of a shared memory programming model to address the problem of portability of application codes between distributed memory and shared memory architectures. We do this with an extension of the Parallel C Preprocessor. The extension, borrowed from Split-C and AC, uses type qualifiers instead of storage class modifiers to declare variables that are shared among processors. The type qualifier declaration supports an abstract shared memory facility on distributed memory machines while making direct use of hardware support on shared memory architectures. Our benchmarking study spans a wide range of shared memory and distributed memory platforms. Benchmarks include Gaussian elimination with back substitution, a two-dimensional fast Fourier transform, and a matrix-matrix multiply. We find that the type-qualifier-based shared memory programming model is capable of efficiently spanning both distributed memory and shared memory architectures. Although the resulting shared memory programming model is portable, it does not remove the need to arrange for overlapped or blocked remote memory references on platforms that require these tuning measures in order to obtain good performance.
Cited by 0Open access
Eugene D. Brooks, K.H. Warren · 1997
In this paper we examine the use of a shared memory programming model to address the problem of portability of application codes between distributed memory and shared memory architectures. We do this with an extension of the Parallel C Preprocessor. The extension, borrowed from Split-C and AC, uses type qualifiers instead of storage class modifiers to declare variables that are shared among processors. The type qualifier declaration supports an abstract shared memory facility on distributed memory machines while making direct use of hardware support on shared memory architectures.Our benchmarking study spans a wide range of shared memory and distributed memory platforms. Benchmarks include Gaussian elimination with backsubstitution, a two-dimensional fast Fourier transform, and a matrix-matrix multiply. We find that the type-qualifier-based shared memory programming model is capable of efficiently spanning both distributed memory and shared memory architectures. Although the resulting shared memory programming model is portable, it does not remove the need to arrange for overlapped or blocked remote memory references on platforms that require these tuning measures in order to obtain good performance.
Cited by 3Open access
Jaroslaw Nieplocha, Robert J. Harrison, Richard J. Littlefield · 1994
Portability, efficiency, and ease of coding are all important considerations in choosing the programming model for a scalable parallel application. The message-passing programming model is widely used because of its portability, yet some applications are too complex to code in it while also trying to maintain a balanced computation load and avoid redundant computations. The shared-memory programming model simplifies coding, but it is not portable and often provides little control over interprocessor data transfer costs.This paper describes a new approach, called Global Arrays (GA), that combines the better features of both other models, leading to both simple coding and efficient execution. The key concept of GA is that it provides a portable interface through which each process in a MIMD parallel program can asynchronously access logical blocks of physically distributed matrices, with no need for explicit cooperation by other processes. We have implemented GA libraries on a variety of...
Cited by 0
Nader Khammassi, Jean-Christophe Le Lann · HAL (Le Centre pour la Communication Scientifique Directe) · 2014
International audience
Cited by 1
Paolo Burgio, Andrea Marongiu, Danilo, Robin et al. · SPIRE - Sciences Po Institutional REpository · 2013
International audience
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Burgio P., Marongiu A., Danilo R. et al. · IRIS UNIMORE (University of Modena and Reggio Emilia) · 2013
Modern computer vision and image processing embedded systems exploit hardware acceleration inside scalable parallel architectures, such as tightly-coupled clusters, to achieve stringent performance and energy efficiency targets. Architectural heterogeneity typically makes software development cumbersome, thus shared memory processor-to-accelerator communication is typically preferred to simplify code offioading to HW IPs for critical computational kernels. However, tightly coupling a large number of accelerators and processors in a shared memory cluster is a challenging task, since the complexity of the resulting system quickly becomes too large. We tackle these issues by proposing a template of heterogeneous shared memory cluster which scales to a large number of accelerators, achieving up to 40% better performance/area/watt than simply designing larger main interconnects to accommodate several HW IPs. In addition, following a trend towards standardization of acceleration capabilities of future embedded systems, we develop a programming model which simplifies application development for heterogeneous clusters.
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David A. Richie, James A. Ross, Jamie K. Infantolino · Procedia Computer Science · 2017
The Adapteva Epiphany many-core architecture comprises a scalable 2D mesh Network-on-Chip (NoC) of low-power RISC cores with minimal uncore functionality. Whereas such a processor offers high computational energy efficiency and parallel scalability, developing effective programming models that address the unique architecture features has presented many challenges. We present here a distributed shared memory (DSM) model supported in software transparently using C++ templated metaprogramming techniques. The approach offers an extremely simple parallel programming model well suited for the architecture. Initial results are presented that demonstrate the approach and provide insight into the efficiency of the programming model and also the ability of the NoC to support a DSM without explicit control over data movement and localization.
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Buu Q. Pham, Mark S. Gordon · Journal of Chemical Theory and Computation · 2020
The fully analytic gradient of the second-order Møller-Plesset perturbation theory (MP2) with the resolution-of-the-identity (RI) approximation in the fragment molecular orbital (FMO) framework is derived and implemented using a hybrid multilevel parallel programming model, a combination of the general distributed data interface (GDDI) and the OpenMP API. The FMO/MP2 analytic gradient contains three parts, i.e., the internal fragment component, the electrostatic potential (ESP) component, and the response terms. The RI approximation is applied to the internal fragment MP2 gradient term, whose MP2 densities and monomer MP2 Lagrangians are shared with the ESP and the response terms. The FMO/RI-MP2 analytic gradient implementation is validated against the numerical gradient (with errors ∼10<sup>-6</sup>-10<sup>-5</sup> Hartree/Bohr) and the energy conservation in molecular dynamics (MD) simulations using NVE ensembles. The RI approximation introduces an error of ∼10<sup>-5</sup> Hartree/Bohr with a speedup of 4.0-8.0× compared with the currently available GDDI FMO/MP2 gradient. The node linear scaling of the fragmentation framework due to multilevel parallelism is well-preserved and is demonstrated in single-point gradient calculations of large water clusters (e.g., 1120 and 2165 molecules) using 300-800 KNL compute nodes with a parallel efficiency of more than 90%.
Cited by 23
Khalid Mohammad Jaber, Rosni Abdullah, N.A. Nur' et al. · International Journal of Bioinformatics Research and Applications · 2014
In recent times, the size of biological databases has increased significantly, with the continuous growth in the number of users and rate of queries; such that some databases have reached the terabyte size. There is therefore, the increasing need to access databases at the fastest rates possible. In this paper, the decision tree indexing model (PDTIM) was parallelised, using a hybrid of distributed and shared memory on resident database; with horizontal and vertical growth through Message Passing Interface (MPI) and POSIX Thread (PThread), to accelerate the index building time. The PDTIM was implemented using 1, 2, 4 and 5 processors on 1, 2, 3 and 4 threads respectively. The results show that the hybrid technique improved the speedup, compared to a sequential version. It could be concluded from results that the proposed PDTIM is appropriate for large data sets, in terms of index building time.
Cited by 5