article · Journal of Circuits Systems and Computers · 2018

Improving ILP via Fused In-Order Superscalar and VLIW Instruction Dispatch Methods

Yumin Hou, Xu Wang, Jiawei Fu, Junping Ma, Hu He, Xu Yang

Cited by 2Abstract and details only

Abstract

In order to expand the computation capability of digital signal processing on a General Purpose Processor (GPP), we propose a fused microarchitecture that improves Instruction Level Parallelism (ILP) by supporting both in-order superscalar and very long instruction word (VLIW) dispatch methods in a single pipeline. This design is based on ARMv7-A&R Instruction Set Architecture (ISA). To provide a performance comparison, we first design an in-order superscalar processor, considering that ARM GPPs always adopt superscalar approaches. And then we expand VLIW dispatch method based on this processor, to realize the fused microarchitecture. The two designs are both evaluated on the Xilinx 7-series FPGA (XC7K325T-2FFG900C), using Xilinx Vivado design suite. The results show that, compared with the superscalar processor, the processor working under VLIW mode can improve the performance by 15% and 8%, respectively, when running EEMBC and DSPstone benchmarks. We also run the two benchmarks on ARM Cortex-A9 processor, which is integrated in the Zynq-7000 AP SoC device on Xilinx ZC706 evaluation board. The processor in VLIW mode shows 44% and 30% performance improvements than ARM Cortex-A9. The fused microarchitecture adopts a combined bimodal and PAp branch prediction method. This method achieves 93.7% prediction accuracy with limited hardware overhead.

Cite this paper

APA 7

Hou, Y., Wang, X., Fu, J., Ma, J., He, H., & Yang, X. (2018). Improving ILP via Fused In-Order Superscalar and VLIW Instruction Dispatch Methods. Journal of Circuits Systems and Computers, 28(02), 1950020. https://doi.org/10.1142/s0218126619500208

MLA 9

Hou, Yumin, et al. “Improving ILP via Fused In-Order Superscalar and VLIW Instruction Dispatch Methods.” Journal of Circuits Systems and Computers, vol. 28, no. 02, 2018, p. 1950020, https://doi.org/10.1142/s0218126619500208.

Chicago

Hou, Yumin, Xu Wang, Jiawei Fu, Junping Ma, Hu He, and Xu Yang. 2018. “Improving ILP via Fused In-Order Superscalar and VLIW Instruction Dispatch Methods.” Journal of Circuits Systems and Computers 28 (02): 1950020. https://doi.org/10.1142/s0218126619500208.

Harvard

Hou, Y. et al. (2018) ‘Improving ILP via Fused In-Order Superscalar and VLIW Instruction Dispatch Methods’, Journal of Circuits Systems and Computers, 28(02), p. 1950020. Available at: https://doi.org/10.1142/s0218126619500208.

BibTeX

@article{hou2018improving,
  title = {{Improving ILP via Fused In-Order Superscalar and VLIW Instruction Dispatch Methods}},
  author = {Hou, Yumin and Wang, Xu and Fu, Jiawei and Ma, Junping and He, Hu and Yang, Xu},
  journal = {Journal of Circuits Systems and Computers},
  volume = {28},
  number = {02},
  pages = {1950020},
  year = {2018},
  doi = {10.1142/s0218126619500208}
}

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