Switch-level timing simulation of MOS VLSI circuits

Allen, J., Rao, V. B., Overhauser, D. V., & Hajj, I. N. (1988). Switch-level timing simulation of MOS VLSI circuits. CERN Document Server (European Organization for Nuclear Research).

Allen, Jonathan, et al. “Switch-level timing simulation of MOS VLSI circuits.” CERN Document Server (European Organization for Nuclear Research), 1988.

Allen, Jonathan, Vasant B Rao, David V Overhauser, and Ibrahim N Hajj. 1988. “Switch-level timing simulation of MOS VLSI circuits.” CERN Document Server (European Organization for Nuclear Research).

Allen, J. et al. (1988) ‘Switch-level timing simulation of MOS VLSI circuits’, CERN Document Server (European Organization for Nuclear Research).

@misc{allen1988switch,
  title = {{Switch-level timing simulation of MOS VLSI circuits}},
  author = {Allen, Jonathan and Rao, Vasant B and Overhauser, David V and Hajj, Ibrahim N},
  journal = {CERN Document Server (European Organization for Nuclear Research)},
  year = {1988}
}