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article · 2008

Hardware Protection and Authentication Through Netlist

Rajat Subhra Chakraborty, Swarup Bhunia

Cited by 0Abstract and details only

Abstract

Abstract—Hardware Intellectual Property (IP) cores have emerged as an integral part of modern System–on–Chip (SoC) designs. However, IP vendors are facing major challenges to protect hardware IPs and to prevent revenue loss due to IP piracy. In this paper, we propose a novel design methodology for hardware IP protection and authentication using netlist level authentication. The proposed methodology can be integrated in the SoC design and manufacturing flow to provide hardware protection to the IP vendors, the chip designer, and the system designer. Simulation results on ISCAS–89 benchmark circuits show that we can achieve high levels of security through a well– formulated obfuscation scheme at less than 10 % area overhead under delay constraint. Index Terms — Design for security, IP piracy, hardware authentication, hardware obfuscation, hardware protection. I.

Cite this paper

APA 7

Chakraborty, R. S., & Bhunia, S. (2008). Hardware Protection and Authentication Through Netlist.

MLA 9

Chakraborty, Rajat Subhra, and Swarup Bhunia. “Hardware Protection and Authentication Through Netlist.” 2008.

Chicago

Chakraborty, Rajat Subhra, and Swarup Bhunia. 2008. “Hardware Protection and Authentication Through Netlist.”

Harvard

Chakraborty, R.S. and Bhunia, S. (2008) ‘Hardware Protection and Authentication Through Netlist’.

BibTeX
@article{chakraborty2008hardware,
  title = {{Hardware Protection and Authentication Through Netlist}},
  author = {Chakraborty, Rajat Subhra and Bhunia, Swarup},
  year = {2008}
}

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