article · 2008

Software-Controlled Operand-Gating

Ramon Canal, et al.

Cited by 0Abstract and details only

Abstract

Operand gating is a technique for improving processor energy efficiency by gating off sections of the data path that are unneeded by short-precision (narrow) operands. A method for implementing software-controlled power gating is proposed and evaluated. The instruction set architecture (ISA) is enhanced to include opcodes that specify operand widths (if not already included in the ISA). A compiler or a binary translator uses statically available information to determine initial value ranges. The technique is enhanced through a profile-based analysis that results in the specialization of certain code regions for a given value range. After the analysis, instruction opcodes are assigned using the minimum required width. To evaluate this technique the Alpha instruction set is enhanced to include opcodes for 8, 16, and 32 bit operands. Applying the proposed software technique to the SpecInt95 benchmarks results in energy-delay 2 savings of 14%. When combined with previously proposed hardware-based techniques, the energy-delay 2 benefit is 28%.

Cite this paper

APA 7

Ramon Canal, E. A. (2008). Software-Controlled Operand-Gating.

MLA 9

Ramon Canal, et al. “Software-Controlled Operand-Gating.” 2008.

Chicago

Ramon Canal, et al. 2008. “Software-Controlled Operand-Gating.”

Harvard

Ramon Canal, E.A. (2008) ‘Software-Controlled Operand-Gating’.

BibTeX

@article{ramoncanal2008software,
  title = {{Software-Controlled Operand-Gating}},
  author = {Ramon Canal, et al.},
  year = {2008}
}

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