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About 807 papers for “CISC”

Arquitectura CISC

Bulletin of Miscellaneous Information (Royal Gardens Kew) · 2010

Cited by 0

Arquitectura CISC

Bulletin of Miscellaneous Information (Royal Gardens Kew) · 2010

Cited by 0

A minimal CISC

Douglas W. Jones · ACM SIGARCH Computer Architecture News · 1988

The minimal CISC architecture presented here is an extremely simple zero-address architecture suitable for microprogrammed implementation. It is sufficiently simple to be introduced in one lecture, with time left over for discussion of implementation or enhancement options.

Cited by 2Open access

RISC versus CISC

Tariq Jamil · IEEE Potentials · 1995

The author carries out a comparison of CISC (complex instruction set computing) and RISC (reduced instruction set computing). The author discusses what RISC is and its shortcomings. The evolution of CISC and RISC microprocessors is then discussed and prospects for the future are examined.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Cited by 28

Rematch for CISC

C. R. Edwards · Information Professional · 2004

The complex instruction set computer (CISC) seemed consigned to the dustbin of history. But it&apos;s coming back to deal with a growing need for custom instructions to get more performance out of processors beyond multimedia applications. The first thing needed in order to produce one of these customisable processors is a way of altering the hardware at runtime. Configurable processors are used widely in digital audio players, storage units and network equipment. FPGAs are commonly used in low-volume hardware as alternatives to custom chips. The latest processor makes it possible to build long instruction words out of the processor operations that are available to the basic processor.

Cited by 0

Micronet-based CISC Architectures

Arvind And Bainbridge, D. K. Arvind, C. Bainbridge · 2001

We have in the past investigated the design and implementation of micronet-based architectures of the scalar[AR94], superscalar[AM99], VLIW[AS97] and Multithreaded[AHKR01] kind, which were all based on a RISC-like instruction set. In this paper, we present a preliminary design, based around a micronet core, of an asynchronous Complex Instruction Set Computer (CISC) architecture. A TRANSLATOR module converts the CISC instructions into ones which are native to the micronet datapath, called the milliops instructions. This translation can be accomplished either in hardware, as in Intel&amp;apos;s x86 architectures, or in software, in the style of Transmeta&amp;apos;s Crusoe architecture. The design environment enables C programs targeted at the CISC architecture, to be executed on a RTL model of the micronet core, and its execution and power consumption can be visualised over space and time. This allows a systematic study of the effect of compiler and architectural optimisations of micronet-based CISC processors, on the performance of application benchmarks.

Cited by 0

Project for CISC-868

David Rappaport · 2011

• Read some (3-5) technical papers in the field of computational geometry. • Understand what you are reading, at a level where you at least know what the paper is about, and appreciate the contribution. You may not understand every nuance of every proof of the paper. That is acceptable. However, you should at least understand the point of every theorem and/or lemma and/or algorithm and be able to explain what it means to a classmate.

Cited by 0

RISC vs. CISC vs.?

RaymondE. Dessy · Chemometrics and Intelligent Laboratory Systems · 1990

Cited by 0

architecture risc et cisc

Christopher Daniels · Zenodo (CERN European Organization for Nuclear Research) · 2024

Cited by 0Open access

CISC Cartagena International Scout Center.

Mañas Zabala, Álvaro · Digital Repository (Universidad Politécnica de Cartagena) · 2022

Se propone la construcción de un Centro Internacional Scout que permita la realización de actividades en la naturaleza,que de a conocer la amplia red de senderos que recorren nuestra costa y la gran cantidad de ofertas que plantea nuestro entorno.Todo ello mediante la recuperación de un espacio abandonado en el saliente de Trincabotijas, siendo éste el emplazamiento del primer baluarte defensivo del puerto de Cartagena y que en la actualidad se encuentra en desuso y en estado lamentable. Los recursos turísticos y educativos que residen en un buen uso del entorno del litoral costero encaja a la perfección con una evolución educativa y social sostenible y respetuosa dentro del marco del de la metodología Scout. Siguiendo estas líneas de actuación se plantea la propuesta, bajo mi criterio tan necesaria, para acercar la naturaleza a la población y hacer participe a la gente del uso disfrute y protección del medio que nos rodea, generando a su vez unfoco turístico a nivel internacional para que puedan visitarlo miembros del movimiento Scout de cualquier parte del mundo.

Cited by 0

An overview of RISC vs. CISC

Alan D. George · 2002

One of the most significant recent developments in computer processor technology is the RISC (reduction-instruction-set-computer) microprocessor. Under certain circumstances, RISC devices offer significant advantages over their conventional CISC (complex-instruction-set-computer) counterparts. A brief comparison of the principal features of both RISC and CISC processors is presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Cited by 19

RISC and CISC Computer Architecture

Samo Ribarič · 1996

Namjena knjige je podastrijeti citatelju zamisli i temelje za razumijevanje, vrednovanje i uspoređivanje alternativnih nacela oblikovanja koja se rabe u CISC (Complex Instruction Set Computer) i RISC (Reduced Instruction Set Computer) arhitekturi procesora i racunalnih sustava. Knjiga je zamisljena kao sustavni, postupni uvod u arhitekturu i organizaciju procesora i racunalnih sustava. Osnovne su zamisli i temelji arhitekture CISC i RISC podrobno opisane i ilustrirane na mnostvu primjera komercijalno raspoloživih procesora. Posebna je pozornost obracena opisu zamisli i temelja koji predstavljaju arhitektonske vremenske stalnice u ovom tehnoloski nemirnom podrucju s naglim razvojem. Na taj se nacin pokusava usporiti zastarijevanje gradiva i citatelju ponuditi opise koji su tehnoloski nezavisni, a cine podlogu za razumijevanje danasnjih (i sutrasnjih) arhitektura.

Cited by 0

Peering through the RISC/CISC fog

Robert P. Colwell, Charles Y. Hitchcock, E. Douglas Jensen · ACM SIGARCH Computer Architecture News · 1983

We are defining a computer architecture to support a decentralized operating system that is under development. Since complex functions of this system could appear directly in the architecture's instruction set, we are immersed in the current RISC/CISC debate where we have found many questions and few answers. Hoping to shed light on aspects of this conflict, we have embarked on two studies. The first seeks to find an environment where complex instructions can enhance system performance. The second tries to decouple multiple register set performance from instruction set performance in general-purpose register machines.

Cited by 13