Gary J Nutt, A.J. Griff, J.E. Mankovich et al. · 2002
Performance bugs have classically been difficult to identify in high performance programs. The problem arises because there is a broad spectrum of causes of performance degradation, and because it may be necessary to apply specialized diagnostics to search the performance space. The prototype tuning environment we are developing enables one to explore the performance space of a program using customized performance visualization techniques. It addresses the breadth problem by providing tools known to be useful for broad explorations, tools for inspecting specific performance bugs, and an ability to extend the observation platform by custom analysis and visualization. This paper describes the ParaVision tool that enables one to integrate various PICL-based performance tools into a single user environment.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
Cited by 14
In The Capse, A. Ferscha, G. Kotsis · 2007
Performance orientation in the development process of parallel software is motivated by outlining the misconception of current approaches where performance activies come in at the very end of the development, mainly in terms of measurement or monitoring after the implementation phase. At that time major part of the developmentwork is already done, and performance pitfalls are very hard to repair - if this is possible at all. A development process for parallel programs that launches performance engineering in the early design phase is proposed.
Cited by 0
K. C. Li, K. Zhang · 1995
Cited by 0
METAFERIA, ALEMU TADESSE · Electronic Theses and Dissertations Repository (University of Pisa) · 2020
The thesis provides a tool to explore the performances achieved using functionally equivalent parallel programs obtained through refactoring of an initial parallel program in a structured parallel programming context. The refactoring rules may easily lead to infinite refactoring trees. The thesis considers nite trees and looks for nodes delivering the minimum service time (that is maximum performance according to the available performance models). A parallel exploration solution has been designed based on simulated annealing. Experiments show that good solutions are actually found and that the parallel algorithm shows good speedup and scalability on state-of-the-art multicore architectures.
Cited by 0
Antonio Espinosa Toms, Antonio Espinosa, Toms Margalef et al. · 2007
1 Actual behaviour of parallel programs is of capital importance for the development of an application. Programs will be considered matured applications when their performance is under acceptable limits. Traditional parallel programming forces the programmer to understand the enormous amount of performance information obtained from the execution of a program. In this paper, we propose an automatic analysis tool that lets the programmers of applications avoid this difficult task. Keywords Performance analysis of parallel programs, parallel program design, automatic bottleneck detection. 1. INTRODUCTION The performance of a parallel program is one of the main reasons for designing and building a parallel program [1]. When facing the problem of analysing the performance of a parallel program, programmers, designers or occasional parallel systems users must acquire the necessary knowledge to become performance analysis experts. The amount of data to be visualised and analysed, togeth...
Cited by 0
Wagner Meira, Thomas J. Leblanc · 1997
This paper describes a general framework and several specific techniques for cause-effect analysis: an automated inference process that presents explanations for dynamic phenomena of parallel program executions in terms of underlying causes and the related source code. We illustrate the framework by describing the implementation of three analysis techniques: waiting time analysis identifies the cause of synchronization overhead as the differences in execution paths taken by synchronizing processors; protocol analysis identifies the sharing patterns to pages that produce invalidations in a DSM protocol; and transaction analysis identifies conflicts between transactions in a parallel file system that cause aborts. We present examples of how each technique can be used to understand observed performance effects, and how insights derived from these techniques suggest program modifications that lead to improved performance. 1 Introduction Many performance phenomena arise during execution ...
Cited by 0
Sekkar R. Sarukkai, Jacob K. Gotwais, Jerry Yan et al. · NASA Technical Reports Server (NASA) · 1994
Existing tools for debugging performance of parallel programs either provide graphical representations of program execution or profiles of program executions. However, for performance debugging tools to be useful, such information has to be augmented with information that highlights the cause of poor program performance. Identifying the cause of poor performance necessitates the need for not only determining the significance of various performance problems on the execution time of the program, but also needs to consider the effect of interprocessor communications of individual source level data structures. In this paper, we present a suite of normalized indices which provide a convenient mechanism for focusing on a region of code with poor performance and highlights the cause of the problem in terms of processors, procedures and data structure interactions. All the indices are generated from trace files augmented with data structure information.. Further, we show with the help of examples from the NAS benchmark suite that the indices help in detecting potential cause of poor performance, based on augmented execution traces obtained by monitoring the program.
Cited by 0
Antonio Espinosa, Tomàs Margalef, Emilio Luque · 1998
Actual behaviour of parallel programs is of capital importance for the development of an application. Programs will be considered matured applications when their performance is under acceptable limits. Traditional parallel programming forces the programmer to understand the enormous amount of performance information obtained from the execution of a program. In this paper, we propose an automatic analysis tool that lets the programmers of applications avoid this difficult task. This automatic performance analysis tool main objective is to find poor designed structures in the application. It considers the trace file obtained from the execution of the application in order to locate the most important behaviour problems of the application. Then, the tool relates them with the corresponding application code and scans the code looking for any design decision which could be changed to improve the behaviour.
Cited by 2
Rizos Sakellariou, Vikram Adve · 2001
This talk illustrates how parallelizing compiler technology can be used to greatly simplify and, in many cases, to fully automate the process of applying diverse modeling techniques to model a parallel application. First, we will present the key features of a program workload representation that has been designed to support both compiler synthesis as well as detailed performance prediction. Then, we will present compiler techniques that we used to derive a concise form of this workload description automatically for a given program. The focus of these techniques is HPF programs compiled to MPI using the Rice dHPF compiler | issues related to explicit message-passing codes will also be discussed.
Cited by 0
Nathan R. Tallent, John Mellor‐Crummey · 2012
Cited by 0
Andrew W. Kwan, Lubomir Bic, Daniel D. Gajski · eScholarship (California Digital Library) · 1989
A programming tool that performs analysis of critical paths for parallel programs has been developed. This tool determines the critical path for the program as scheduled onto a parallel computer with P processing elements, the critical path for the program expressed as a data flow graph (when maximal parallelism can be expressed), and the minimum number of processing elements (P_opt) needed to obtain maximum program speedup. Experiments were performed using several versions of a Gaussian elimination program to examine how speedup varied with changes in granularity and critical path length. These experiments showed that when the available numer of processing elements P &lt; P_opt, increasing granularity improved program speedup more than reducing (the data flow graph's) critical path length, whereas when P ≥ P_opt, increasing granularity degraded program speedup while reducing critical path length improved program speedup.
Cited by 3Open access
Boris Sedov, Alexey Syschikov, Yuriy Sheynin et al. · SHILAP Revista de lepidopterología · 2015
During the embedded system development an estimation of software performance on different hardware is needed. Estimation of the expected acceleration of program execution on various numbers of processors, estimation of computation space etc. Such estimations, as other aspects of performance analysis complex, should help with different problems that arise at the intersection of software and hardware parts. For example, selection of the most successful hardware platform from available options for current program solution or modernization of the program for better resource use of given hardware platform and achieve best performance. In the paper tool of static analysis is considered. It is a part of the complex of program performance analysis in integrated development environment VIPE for perspective multicore embedded systems.
Cited by 1Open access
Xu Liu · Rice Digital Scholarship Archive (Rice University) · 2014
Parallel architectures have become common in supercomputers, data centers, and mobile chips. Usually, parallel architectures have complex features: many hardware threads, deep memory hierarchies, and non-uniform memory access (NUMA). \nProgram designs without careful consideration of these features may lead to poor performance on such architectures. First, multi-threaded programs can suffer from performance degradation caused by imbalanced workload, overuse of synchronization, and parallel overhead. Second, parallel programs may suffer from the long latency to the main memory. Third, in a NUMA system, memory accesses can be remote rather than local. \nWithout a NUMA-aware design, a threaded program may have many costly remote accesses and imbalanced memory requests to NUMA domains.\n\nPerformance tools can help us take full advantage of the power of parallel architectures by providing insight into where and why a program fails to obtain top performance. This dissertation addresses the difficulty of obtaining insights about performance bottlenecks in parallel programs using lightweight measurement techniques. This dissertation makes four contributions. \nFirst, it describes a novel performance analysis method for OpenMP programs, which can identify root causes of performance losses. Second, it presents a data-centric analysis method that associates performance metrics with data objects. This data-centric analysis can both identify both a program's problematic memory accesses and associated variables; this information can help an application developer optimize programs for better locality. Third, this dissertation discusses the development of a lightweight method that collects memory reuse distance to guide cache locality optimization. Finally, it describes implemented a lightweight profiling method that can help pinpoint performance losses in programs on NUMA architectures and provide guidance about how to transform the program to improve performance.\n\nTo validate the utility of these methods, I implemented them in HPCToolkit, a state-of-the-art profiler developed at Rice University. I used the extended HPCToolkit to study several parallel programs. Guided by the performance insights provided by the new techniques introduced in this dissertation, I optimized all of these programs and was able to obtain non-trivial improvements to their performance. The measurement overhead incurred by these new analysis methods is very small in both runtime and memory.
Cited by 0Open access
Jih-Kwon Peir, Kimming So, Jiangting Tang · 1993
Private caches are critical components in high per formance multiprocessor systems. However, it has been found that, when executing a parallel program, individual processors are very difficult to attain high cache hit ratio from one program section to another; therefore sophisti cated software coherence schemes are not cost effective. In this study, trace-driven simulation has been used to evaluate various less sophisticated compiler and software techniques which can enhance this inter-section locality in parallel executions. We found that the locality can be substantially im proved through the following ways of altering the sched uling of iterations in parallel DO loops among the executing processors: i) assignment of iterations in chunks, ii) reversed execution of parallel loops, and Hi) interchange inner and outer loops. These can be done manually by a programmer or automatically by a parallelizing compiler. Moreover, we also propose a software coherence scheme which can attain the maxi mum inter-section locality for read-only shared data.
Cited by 8
Bruce Irvin, R. Bruce, Irvin Barton et al. · 1993
Program performance measurement tools have proven to be useful for tuning single, isolated, parallel and distributed applications. However, large-scale parallel machines and heterogeneous networks often do not allow for such isolated execution, much less isolated measurement. Performance measurement tools should allow users to study workload scheduling policies, resource competition among application programs, client/server interactions in distributed systems, and comparisons of application programs running on multiple hardware platforms. To enable and encourage such studies, we have extended the IPS-2 parallel program measurement tools to support the analysis of multiple applications (and multiple runs of the same application) in a single measurement session. This multi-application support allows the user to study each application as a logically separate entity, study groupings of the applications based on their physical location, or study the entire collection of applications. We use...
Cited by 0
A. Ferscha, G. Kotsis · 2007
Performance orientation in the development process of parallel software is motivated by outlining the misconception of current approaches where performance activies come in at the very end of the development, mainly in terms of measurement or monitoring after the implementation phase. At that time major part of the development work is already done, and performance pitfalls are very hard to repair - if this is possible at all. A development process for parallel programs that launches performance engineering in the early design phase is proposed. The systematic integration of a set of tools supporting performance oriented parallel programming results in the CAPSE (Computer Aided Parallel Software Engineering) environment. 1 Introduction Having in mind the traditional (sequential) software development process where performance issues are insufficiently considered [Fox 89], one is now (naturally) convinced that performance analysis is a critical factor in the upcoming parallel so...
Cited by 0
Procter, Robert · Research Explorer (The University of Manchester) · 1998
Cited by 0Open access
Cyrille Bareau, Yves Mahéo, Jean-Louis Pazat · HAL (Le Centre pour la Communication Scientifique Directe) · 1994
In this paper, we present theoverall design of Pandore II, anenvironment dedicated to the experimentation of distribution of sequential programs for their execution on distributed memory parallel architectures. The emphasis is then put on two performance analysis tools integrated in this environment.
Cited by 4Open access
Brian J. N. Wylie, Akiyoshi Endo · 1996
The Annai integrated tool environment is currently being developed to help exploit the inherent power of distributed-memory parallel computers with standardized languages and convenient programming support. As they are designed and implemented, prototypes of the compiler, debugger and performance tools are used and evaluated by a team developing applications and libraries, leading to further refinements. Portable application development is supported in High Performance Fortran and/or with explicit message passing, using MPI as the machine interface. Key design aspects of the performance monitor and analyzer (PMA) component were usability and scalability. Integration within a unified tool environment allows the user investigating performance to interact with the high-level source code and distributed arrays during program execution on the same terms as when using the parallel debugger. Detailed data distribution and other program information furnished by the parallelization support an...
Cited by 0
Antonio Espinosa, Tomàs Margalef · 2008
Actual behaviour of parallel programs is of capital importance for the development of an application. Programs will be considered matured applications when their performance is under acceptable limits. Traditional parallel programming forces the programmer to understand the enormous amount of performance information obtained from the execution of a program. In this paper, we propose an automatic analysis tool that lets the programmers of applications avoid this difficult task.
Cited by 0