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About 2,152 papers for “trace buffer”

FPGA debug using incremental trace buffer

Telsi Divya, Rajamurthy, P. · 2015

Design verification is an essential step in the development of any product. It ensures that the product as designed is the same as the product as intended. Software simulation is the common approach for validating hardware design unfortunately, it will take hours together to execute. Difficulties in validation arises due to the complexity of the design and also due to the lack of on chip observability. One common solution to this problem is to instrument the prototype using trace-buffers to record a subset of internal signals into on-chip memory for subsequent analysis. In the proposed system, an example circuit is implemented to perform the tracing operation and  various trace buffers are designed to record the different stages of internal signal states. The resulting signal states are to be stored, like a error outputs. Low power methodologies are also implemented to achieve low power consumption. Thus the errors are separately stored in the memory for analyzing the signals. This might be used for changes in the logic wherever needed. Thus this tracing is performed to monitor signal states of an FPGA.Design verification is an essential step in the development of any product. It ensures that the product as designed is the same as the product as intended. Software simulation is the common approach for validating hardware design unfortunately, it will take hours together to execute. Difficulties in validation arises due to the complexity of the design and also due to the lack of on chip observability. One common solution to this problem is to instrument the prototype using trace-buffers to record a subset of internal signals into on-chip memory for subsequent analysis. In the proposed system, an example circuit is implemented to perform the tracing operation and  various trace buffers are designed to record the different stages of internal signal states. The resulting signal states are to be stored, like a error outputs. Low power methodologies are also implemented to achieve low power consumption. Thus the errors are separately stored in the memory for analyzing the signals. This might be used for changes in the logic wherever needed. Thus this tracing is performed to monitor signal states of an FPGA.

Cited by 0

Multi-Buffer Simulations for Trace Language Inclusion

Hutagalung, Milka, Hundeshagen, Norbert, Kuske, Dietrich et al. · arXiv (Cornell University) · 2016

We consider simulation games played between Spoiler and Duplicator on two Büchi automata in which the choices made by Spoiler can be buffered by Duplicator in several buffers before she executes them on her structure. We show that the simulation games are useful to approximate the inclusion of trace closures of languages accepted by finite-state automata, which is known to be undecidable. We study the decidability and complexity and show that the game with bounded buffers can be decided in polynomial time, whereas the game with one unbounded and one bounded buffer is highly undecidable. We also show some sufficient conditions on the automata for Duplicator to win the game (with unbounded buffers).

Cited by 0Open access

Algorithms and Low Cost Architectures for Trace Buffer-Based Silicon Debug

Sandesh Prabhakar, Michael S. Hsiao, Christopher L. Wyatt et al. · VTechWorks (Virginia Tech) · 2009

An effective silicon debug technique uses a trace buffer to monitor and capture a portion of the circuit response during its functional, post-silicon operation. Due to the limited space of the available trace buffer, selection of the critical trace signals plays an important role in both minimizing the number of signals traced and maximizing the observability/restorability of other untraced signals during post-silicon validation. In this thesis, a new method is proposed for trace buffer signal selection for the purpose of post-silicon debug. The selection is performed by favoring those signals with the most number of implications that are not implied by other signals. Then, based on the values of the traced signals during silicon debug, an algorithm which uses a SAT-based multi-node implication engine is introduced to restore the values of untraced signals across multiple time-frames. A new multiplexer-based trace signal interconnection scheme and a new heuristic for trace signal selection based on implication-based correlation are also described. By this approach, we can effectively trace twice as many signals with the same trace buffer width. A SAT-based greedy heuristic is also proposed to prune the selected trace signal list further to take into account those multi-node implications. A state restoration algorithm is developed for the multiplexer-based trace signal interconnection scheme. Experimental results show that the proposed approaches select the trace signals effectively, giving a high restoration percentage compared with other techniques. We finally propose a lossless compression technique to increase the capacity of the trace buffer. We propose real-time compression of the trace data using Frequency-Directed Run-Length (FDR) code. In addition, we also propose source transformation functions, namely difference vector computation, efficient ordering of trace flip-flops and alternate vector reversal that reduces the entropy of the trace data, making them more amenable for compression. The order of the trace flip-flops is computed off-chip using a probabilistic algorithm. The difference vector computation and alternate vector reversal are implemented on-chip and incurs negligible hardware overhead. Experimental results for sequential benchmark circuits shows that this method gives a better compression percentage compared to dictionary-based techniques and yields up to 3X improvement in the diagnostic capability. We also observe that the area overhead of the proposed approach is less compared to dictionary-based compression techniques.

Cited by 1

Trace Buffer Attack: Security versus observability study in post-silicon debug

Yuanwen Huang, Anupam Chattopadhyay, Prabhat Mishra · 2015

Since the standardization of AES/Rijndael symmetric-key cipher by NIST in 2001, it gained widespread acceptance in various protocols and withstood intense scrutiny from the theoretical cryptanalysts. From the physical implementation point of view, however, AES remained vulnerable. Practical attacks on AES via fault injection, differential power analysis, scan-chain and cache-access timing have been demonstrated so far. Along this line, in this paper, we propose a novel and effective attack, termed Trace Buffer Attack. Trace buffers are extensively used for post-silicon debug of digital designs. We identify this as a source of information leakage and show that, unless proper countermeasure is taken, Trace Buffer Attack is capable of partially recovering the secret keys of different AES implementations. We report the detailed process of trace-buffer attack with experimental results. We also propose a countermeasure in order to avoid such attack.

Cited by 15

LIBS Detection Characteristics of Trace Heavy Metal in Different Buffer Gases

Zhenzhen Wang, Renwei Liu, Ruomu Hu et al. · 2017

In order to measure the trace heavy metal in flue gas, the trace heavy metal of Hg in different buffer gases was studied using LIBS under various conditions, which shows different detection characteristics. The detection ability can be enhanced when reducing the pressure. The trace heavy metal of Hg will be measured in flue gas using this method.

Cited by 0

Implementation of Hardware Trace Buffer Module for RISC-V Processor Core

Bohdan Shveida, Krzysztof Marcinek, Witold A. Pleskacz · 2024

Debugging of modern embedded systems can be very challenging due to the close cooperation of many independent components they consist of. The necessity to maintain timing dependencies during the debugging process of one component requires using non-intrusive methods, such as instruction tracing. In this paper we present a Verilog RTL implementation of a trace buffer module for a single-issue RISC-V processor. Our trace buffer is capable of adapting signals available in processor core to make any single-issue RISC- V processor compatible with the encoder interface. The system produces and saves enough data to reproduce the program flow based on the collected data, the program binary and firmware source code. The generated data packets are stored inside the internal FIFO buffer that can be reached through the configuration and status register interface, as well as passed to the transport layer. The implementation follows the Efficient Trace for RISC- V specification. The implemented module has been functionally verified including RISC- V reference test vectors. The design was synthesized with Yosys synthesis tool and FreePDK 45nm standard cell library.

Cited by 2

Determination of trace concentrations of dissolved nitric oxide in a biological buffer

Eric Demoncheaux, Paul J. Foster, Colin Borland et al. · The Analyst · 2003

A new real-time method for measuring a trace concentration of nitric oxide (NO) in a complex matrix routinely used in pharmacological studies of its bioactivity is described. NO was quantified as a gas by chemiluminescence after extraction from a continuous liquid sample flow with a limit of detection of 0.042 nmol dm(-3) at a signal to noise ratio of 3. Theories to calculate the concentration of NO in the liquid sample flow from a direct measurement of NO in the extraction carrier gas are presented. The efficiency of extraction is determined by a stopflow experiment. An example is presented of the measurement of the steady-state concentrations of NO in Krebs-bicarbonate buffer at pH 7.4 and 37 degrees C when its liquid surface is sequentially exposed to gases containing various concentrations of NO in O2 plus CO2.

Cited by 2

Novel Architectures for Trace Buffer Design to facilitate Post-Silicon Validation and Test

Shuchi Pandit · VTechWorks (Virginia Tech) · 2014

Post-Silicon validation is playing an increasingly important role as more chips are failing in the functional mode due to either manufacturing defects escaped during scan-based tests or design bugs missed during pre-silicon validation. Critical to the diagnosis engineer is the ability to observe as many relevant internal signal values as possible during debug. To do so, trace buffers have been proposed for enhancing the observability of internal signals during post-silicon debug. Trace Buffers are used to trace (record the values of) the internal signals in real-time when chip is in its normal operation. However, existing trace buffer architectures trace very few signals for a large number of cycles. Thus, even with a good subset of signals traced, one often still cannot restore all the relevant values in the circuit. In this work, we propose two different flexible trace buffer architectures that can restore the values for all signals by making the trace signals configurable. In addition, the buffer space can also be shared among different traced signals which makes the architectures highly flexible. As compared to conventional trace buffer architectures, the new architectures have comparable area overhead but offer the ability to restore all signals in the circuit. For cases of less than 100% restoration, the ability of circuit invariants to improve the signal restoration is explored. A promising direction for the future work is provided where targeted invariants may lead to better restoration scenario during post-silicon validation.

Cited by 0Open access

Maleic acid/ammonium hydroxide buffer system for preconcentration of trace metals from seawater

Su‐Cheng Pai, Tsai Chu. Chen, George T.F. Wong et al. · Analytical Chemistry · 1990

ADVERTISEMENT RETURN TO ISSUEPREVArticleNEXTMaleic acid/ammonium hydroxide buffer system for preconcentration of trace metals from seawaterSu Cheng. Pai, Tsai Chu. Chen, George T. F. Wong, and Chin Chang. HungCite this: Anal. Chem. 1990, 62, 7, 774–777Publication Date (Print):April 1, 1990Publication History Published online1 May 2002Published inissue 1 April 1990https://pubs.acs.org/doi/10.1021/ac00206a026https://doi.org/10.1021/ac00206a026research-articleACS PublicationsRequest reuse permissionsArticle Views333Altmetric-Citations19LEARN ABOUT THESE METRICSArticle Views are the COUNTER-compliant sum of full text article downloads since November 2008 (both PDF and HTML) across all institutions and individuals. These metrics are regularly updated to reflect usage leading up to the last few days.Citations are the number of other articles citing this article, calculated by Crossref and updated daily. Find more information about Crossref citation counts.The Altmetric Attention Score is a quantitative measure of the attention that a research article has received online. Clicking on the donut icon will load a page at altmetric.com with additional details about the score and the social media presence for the given article. Find more information on the Altmetric Attention Score and how the score is calculated. Share Add toView InAdd Full Text with ReferenceAdd Description ExportRISCitationCitation and abstractCitation and referencesMore Options Share onFacebookTwitterWechatLinked InRedditEmail Other access optionsGet e-Alertsclose Get e-Alerts

Cited by 28

Trace additives enable highly reversible zinc anode via water-deficient pH buffer layer construction

Nan Xu, Chao Peng, Wei Feng et al. · Nano Research · 2025

The commercial application of aqueous zinc-ion batteries (AZIBs) is hindered by dendrite growth, side reaction of hydrogen evolution reaction (HER), and corrosion passivation of zinc anode. In this work, trace inorganic additive ammonium hydrogen borate (AB) was introduced into 2 M ZnSO<sub>4</sub> electrolyte to construct a water-deficient pH buffer layer with electrostatic shielding effect at anode-solution interface. The buffer layer can effectively reduce the water content at the interface and maintain the interfacial pH stable, thereby suppressing the HER and the corrosion of anode. In addition, the NH<sub>4</sub><sup>+</sup> in the additive also demonstrates an electrostatic shielding effect, which alleviates the "tip effect" and increases the nucleation overpotential of the zinc anode. As a result, the buffer layer can induce the uniform deposition of zinc and restrict the growth of dendrites, realizing a highly reversible zinc anode. Under this electrolyte system, the zinc symmetric battery can cycle stably for 7266 h at a current density of 5 mA cm<sup>−</sup><sup>2</sup>, and the cumulative deposition capacity could reach 18.17 Ah cm<sup>-2</sup>. Even under the condition of a high depth of discharge (DOD) of 78.54%, it still maintained an excellent cycle life of 450 h. The zinc-copper half-cell can stably cycle 1400 times at a current density of 10 mA cm<sup>-2</sup> and delivers an ultra-high Coulombic efficiency of 99.70%. The Zn||MnO<sub>2</sub> full cell retains a capacity retention rate of 76.68% after 900 cycles at a current density of 1 A g<sup>-1</sup>, indicating its promising application potential.

Cited by 0Open access

Spotting Silent Buffer Overflows in Execution Trace through Graph Neural Network Assisted Data Flow Analysis

Zhilong Wang, Li Yu, Suhang Wang et al. · arXiv (Cornell University) · 2021

A software vulnerability could be exploited without any visible symptoms. When no source code is available, although such silent program executions could cause very serious damage, the general problem of analyzing silent yet harmful executions is still an open problem. In this work, we propose a graph neural network (GNN) assisted data flow analysis method for spotting silent buffer overflows in execution traces. The new method combines a novel graph structure (denoted DFG+) beyond data-flow graphs, a tool to extract {\tt DFG+} from execution traces, and a modified Relational Graph Convolutional Network as the GNN model to be trained. The evaluation results show that a well-trained model can be used to analyze vulnerabilities in execution traces (of previously-unseen programs) without support of any source code. Our model achieves 94.39\% accuracy on the test data and successfully locates 29 out of 30 real-world silent buffer overflow vulnerabilities. Leveraging deep learning, the proposed method is, to our best knowledge, the first general-purpose analysis method for silent buffer overflows. It is also the first method to spot silent buffer overflows in global variables, stack variables, or heap variables without crossing the boundary of allocated chunks.

Cited by 1Open access

Effect of buffer gases on the performance of SO2 trace measurement based on photoacoustic spectroscopy

Mohebbifar M., Khalilzadeh J., Dibaee B. et al. · zvestiya of the National Academy of Sciences of Belarus (National Academy of Sciences of Belarus) · 2014

In this experimental work a laser photoacoustic spectrometer designed and fabricated. System sensitivity for detection of SO2 and NO 2 was measured. Resonance frequency variation versus pressure increase of Nitrogen, Argon, Helium and Air buffer gases was studied. Results show that, sensitivity of system for SO2 and NO2 are 353 ppb and 963 ppb respectively. It was shown that resonance frequency for Nitrogen, Argon, and Air buffer gases was not noticeably varied by buffer gas pressure increasing, but for Helium, resonance frequency not only is not in range of three other gases, but also grows by pressure increasing. The system noises were damped preparing two buffer chambers. © 2014 Elsevier B.V. All rights reserved.

Cited by 0

Numerical analysis of dual spherical buffer resonant cell for photoacoustic spectroscopy based trace gas sensing

Surjit Kaman, A.S. Bansal, Ripul Ghosh et al. · Physica Scripta · 2025

Abstract In photoacoustic spectroscopy based trace gas sensing, the design and optimization of a resonant gas cell are very crucial to achieve a highly sensitive sensing with small background noise. To supressed the background noise, we have proposed and demonstrated a new design of a resonant photoacoustic gas cell (PAC) wherein we introduced the concept of dual spherical chamber as acoustic buffer instead of a traditional cylindrical buffer separated by a single open-open resonator tube. Detailed simulation studies were performed in COMSOL Multiphysics 6.0 using thermo-viscous acoustic physics to determine the optimal dimensions of the PAC. The simulated signal-to-background noise ratio (SBR)of the optimized dual spherical buffer chamber PAC is 163% higher than that of the traditional optimized cylindrical buffer chamber PAC, which suggests that a dual spherical buffer PAC can be a very good alternative to the traditional cylindrical buffer PAC for photoacoustic spectroscopy based trace gas sensing. Experimental studies were performed with the 3D printed optimized dual spherical buffer PAC and the results shows a very good agreement with the simulation results.

Cited by 1

基于遗传算法的多核芯片并发追踪调试方法

YinHe HAN, Xin LI, Jianxin Wang et al. · Scientia Sinica Informationis · 2014

Trace-based debugging technologies need connect trace signals to trace buffer with additional infrastructure, which not only consumes the limited on chip resource, but also results in the problem of signal integration. Reusing network-on-chip eliminates the problems. But it is still a challenge problem that how to determine the locations of trace buffer under the limitations of link bandwidth and transmission power. We formulate it as P-Median problem which is NP-hard. Then a method based on generic algorithm is proposed. It can optimize the location number of trace buffers and transmission power simultaneously. Experimental results show that multiple trace buffer locations can increase the number of concurrent trace signals in contrast to centralized trace buffer. Compared to previous method, the proposed method can deducing the locations of trace buffer and reducing the transmission power efficiently.

Cited by 0