An FPGA architecture with built-in error correction capability

Abstract

The use of very deep submicron technology makes VLSI-based digital systems more susceptible to transient or soft errors, and thus compromises their reliability. This paper proposes an FPGA architecture inspired by the human immune system that allows tolerance of transient errors. The architecture is composed of a two-dimensional array of identical functional cells with different genetic codes. These codes are chosen based on the required functions to be performed by the functional cells. An error in a FPGA based digital system designed using the proposed architecture is treated as an antigen by the system. Using its distributed defense mechanism the system heals itself from the effect of the error. A major advantage of this architecture is that, the outputs of functional cells are connected to the inputs of other physically adjacent functional cells without having to go through complicated routing. Thus, lengthy communication paths between cells are avoided.

Cite this paper

@article{lala2003fpga,
  title = {{An FPGA architecture with built-in error correction capability}},
  author = {Lala, P.K. and Kumar, B. Kiran},
  pages = {245},
  year = {2003},
  doi = {10.1145/611817.611876}
}

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